• Title/Summary/Keyword: Total ionization dose(TID)

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A CMOS Bandgap Reference Voltage Generator for a CMOS Active Pixel Sensor Imager

  • Kim, Kwang-Hyun;Cho, Gyu-Seong;Kim, Young-Hee
    • Transactions on Electrical and Electronic Materials
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    • v.5 no.2
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    • pp.71-75
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    • 2004
  • This paper proposes a new bandgap reference (BGR) circuit which takes advantage of a cascode current mirror biasing to reduce the V$\_$ref/ variation, and sizing technique, which utilizes two related ratio numbers k and N, to reduce the PNP BJT area. The proposed BGR is designed and fabricated on a test chip with a goal to provide a reference voltage to the 10 bit A/D(4-4-4 pipeline architecture) converter of the CMOS Active Pixel Sensor (APS) imager to be used in X-ray imaging. The basic temperature variation effect on V$\_$ref/ of the BGR has a maximum delta of 6 mV over the temperature range of 25$^{\circ}C$ to 70$^{\circ}C$. To verify that the proposed BGR has radiation hardness for the X-ray imaging application, total ionization dose (TID) effect under Co-60 exposure conditions has been evaluated. The measured V$\_$ref/ variation under the radiation condition has a maximum delta of 33 mV over the range of 0 krad to 100 krad. For the given voltage, temperature, and radiation, the BGR has been satisfied well within the requirement of the target 10 bit A/D converter.

A design of radiation hardened common signal processing module for sensors in NPP (내방사선 원전센서 공통 신호처리 모듈 설계)

  • Lee, Nam-ho;Hwang, Young-gwan;Kim, Jong-yeol;Lee, Seung-min
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.6
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    • pp.1405-1410
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    • 2015
  • In this study we designed the radiation-hardened sensor signal processing modules that can be commonly used for a variety of sensors during normal operation and even in high-radiation environments caused by an accident. First development module was designed to receive the change of the R and C value from the sensors and to process the signal as a PWM modulation scheme. This module was assessed to have ± 10% error to the Full-Scale in the radiation test in the range of 12 kGy TID. The main cause of the error was analyzed as the annealing of the common circuit in the switching element and the consequent increase in the duty ratio of the pulse width modulation circuit according to the radiation dose increasement. The redesigned module for higher radiation resistivity with Stub transistor circuit was found to have less than 5% error to the Full-scale from the radiation test results for 20.7 kGy TID range.

Understanding radiation effects in SRAM-based field programmable gate arrays for implementing instrumentation and control systems of nuclear power plants

  • Nidhin, T.S.;Bhattacharyya, Anindya;Behera, R.P.;Jayanthi, T.;Velusamy, K.
    • Nuclear Engineering and Technology
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    • v.49 no.8
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    • pp.1589-1599
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    • 2017
  • Field programmable gate arrays (FPGAs) are getting more attention in safety-related and safety-critical application development of nuclear power plant instrumentation and control systems. The high logic density and advancements in architectural features make static random access memory (SRAM)-based FPGAs suitable for complex design implementations. Devices deployed in the nuclear environment face radiation particle strike that causes transient and permanent failures. The major reasons for failures are total ionization dose effects, displacement damage dose effects, and single event effects. Different from the case of space applications, soft errors are the major concern in terrestrial applications. In this article, a review of radiation effects on FPGAs is presented, especially soft errors in SRAM-based FPGAs. Single event upset (SEU) shows a high probability of error in the dependable application development in FPGAs. This survey covers the main sources of radiation and its effects on FPGAs, with emphasis on SEUs as well as on the measurement of radiation upset sensitivity and irradiation experimental results at various facilities. This article also presents a comparison between the major SEU mitigation techniques in the configuration memory and user logics of SRAM-based FPGAs.

A CMOS Bandgap Reference Voltage/Current Bias Generator And Its Responses for Temperature and Radiation (CMOS Bandgap 기준 전압/전류 발생기 및 방사능 응답)

  • Lim, Gyu-Ho;Yu, Seong-Han;Heo, Jin-Seok;Kim, Kwang-Hyun;Jeon, Sung-Chae;Huh, Young;Kim, Young-Hee;Cho, Gyu-Seong
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.1093-1096
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    • 2003
  • 본 논문에서는, CMOS APS Image Sensor 내에 포함되어 회로의 면적을 줄인 새롭게 제안된 CMOS Bandgap Reference Bias Generator (BGR)를 온도 및 방사능에 대한 응답을 실험하였다. 제안된 BGR 회로의 설계 목표는 V/sub DD/는 2.5V이상이고, V/sub ref/는 0.75V ± 0.5mV 마진을 가지게 하는 것이다. 제안된 BGR회로는 Level Shifter를 갖는 Differential OP-amp단과 Feedback-Loop를 가지는 Cascode Current Mirror를 사용하여 저전압에서도 동작을 가능하게 하였으며, 높은 출력저항 특성을 가지도록 하였다. 제안된 BGR회로는 하이닉스 0.18㎛ ( triple well two-poly five-metal ) CMOS 공정을 이용하여 Test Chip을 제작하였다. 온도의 변화와 Co-60 노출조건 하에서 Total ionization dose (TID) effect된 BGR회로의 V/sub ref/를 측정하여, 이를 평가하였다. 온도에 대한 반응은, 25℃ 일 때의 V/sub ref/에 대해, 각각 45 ℃에서 0.128%. 70℃에서 0.768% 변화하였다. 그리고 온도가 25℃일 때 50krad와 100krad의 방사능을 조사 하였을 경우, V/sub ref/는 각각 2.466%, 그리고 4.612% 변화하였다.

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