• KSII Transactions on Internet and Information Systems (TIIS)
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• 제6권1호
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• pp.341-360
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• 2012

The network topology for a wide area sensor network has to support connectivity and a prolonged lifetime for the many applications used within it. The concepts of structure and group in sociology are similar to the concept of cluster in wireless sensor networks. The clustering method is one of the preferred ways to produce a topology for reduced electrical energy consumption. We herein propose a cluster topology method based on sociological structures and concepts. The proposed sociological clustering topology (SOCT) is a method that forms a network in two phases. The first phase, which from a sociological perspective is similar to forming a state within a nation, involves using nodes with large transmission capacity to set up the global area for the cluster. The second phase, which is similar to forming a city inside the state, involves using nodes with small transmission capacity to create regional clusters inside the global cluster to provide connectivity within the network. The experimental results show that the proposed method outperforms other methods in terms of energy efficiency and network lifetime.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2013년도 추계학술대회 논문집
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• pp.105-106
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• 2013

This paper proposes a new topology with active switched-capacitor and switched-inductor impedance network, which can obtain a high boost factor with small shoot-through time. The proposed topology uses an active switched capacitor and switched-inductor impedance network in order to couple the main circuit and input dc source for boosting the output voltage. The proposed topology contains all advantages of the classical Z-source inverter. Comparing with other topologies, the proposed topology uses lesser component and the voltage boost inversion ability significantly increases. The theoretical analysis, pulse width modulation control strategies, and a comparison with classical ZSI have been given in this paper. Both simulation and experimental results will be presented to verify the advantages of the proposed topology.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권1호
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• pp.58-69
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• 2016

This paper describes the design and implementation of a new diode clamped multilevel inverter for variable frequency drive. The diode clamp multilevel inverter has been widely used for low power, high voltage applications due to its superior performance. However, it has some limitations such as increased number of switching devices and complex PWM control. In this paper, a new topology is proposed. New topology requires only (N-1) switching devices and (N-3) clamping diodes compared to existing topology. A modified APO-PWM control method is used to generate gate pulses for inverter. The proposed inverter topology is coupled with single phase induction motor and its performance is tested by MATLAB simulation. Finally, a prototype model has built and its performance is tested with single phase variable frequency drive.

• Journal of Power Electronics
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• 제11권6호
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• pp.824-836
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• 2011

A new fault-tolerant control topology for open-loop motor-drive systems with Delta-connected stator windings is introduced in this paper. This new control topology enables the operation of a three-phase induction machine as a two-phase machine fed by a three-phase inverter upon a failure in one of the motor phases. This topology utilizes the "open-Delta" configuration to independently control the current in each of the two remaining healthy phases. This new control technique leads to the alleviation of any torque pulsations resulting from the consequences of the asymmetrical conditions associated with this class of faults.

• Journal of international Conference on Electrical Machines and Systems
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• 제1권3호
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• pp.354-359
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• 2012

A transformerless converter suitable for multiphase drive application is presented in this paper. The topology employs a cascaded H-bridge rectifier as the interface between the grid and multi inverters which drive the multiphase motor. Compared with the conventional structure, the new topology eliminates the input transformer and also has the advantages such as four quadrant operation, simple configuration, low cost, high efficiency, and so on. The control strategies for the grid-side cascade H-bridge rectifier and the motor-side inverter are studied accordingly. Based on the multi-rotational reference frame, modular control scheme is developed to regulate the multiphase drive system. Simulation results show the proper operation of the proposed topology and the corresponding control strategy.

• Journal of Power Electronics
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• 제13권1호
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• pp.51-58
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• 2013

This paper proposes the power conversion mechanism of a bailer-charge-transfer zero-current-switching (CT-ZCS) circuit. The operation modes are analyzed and researched using state trajectory equations. The topology of CT-ZCS based on soft-switching inverters offers some merits such as: tracking the input reference signal dynamically, bearing load shock and short circuit, multiplying inverter N+1 redundancy parallel, coordinating power balance for easy control, and soft-switching commutation for high efficiency and large capacity. These advantages are distinctive from conventional inverter topologies and are especially demanded in AC drives: new energy generation and grid, distributed generation systems, switching power amplifier, active power filter, and reactive power compensation and so on. Prototype is manufactured and experiment results show the feasibility and dynamic voltage-tracking characteristics of the topology.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2007년도 하계학술대회 논문집
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• pp.286-288
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• 2007

The proposed method offers an improved control method for high power density AC/DC adapter by using more energy efficient electrical equipments. Power factor corrector (PFC) topology is based on boost topology with boundary conduction mode (BCM). DC/DC topology is based on half-bridge topology with newly introduced off-time control method, which helps to reduce size of the semiconductor and the magnetic devices. Test results with 85W AC/DC adapter (18.5V/4.6A) design shows that the measured efficiency is 90% with power density of $36W/in^3$. It also show low no load power consumption of about 0.5W.

• 대한임베디드공학회논문지
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• 제14권4호
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• pp.219-226
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• 2019

One of the most widely studied protocols for tactical ad-hoc networks is Optimized Link State Routing Protocol (OLSR). As for OLSR research, most research work focus on reducing control traffic overhead and choosing relay point. In addition, because OLSR is mostly dependent on link detection and propagation, dynamic Hello timer become research challenges. However, different timer interval causes imbalance of link validity time by affecting link lifetime. To solve this problem, we propose a weighted topology graph model for constructing a robust network topology based on the link validity time. In order to calculate the link validity time, we use control message timer, which is set for each node. The simulation results show that the proposed mechanism is able to achieve high end-to-end reliability and low end-to-end delay in small networks.

• Journal of Power Electronics
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• 제15권5호
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• pp.1168-1177
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• 2015

This paper presents a scheme to improve the line current distortion of power factor corrector (PFC) topology at the zero crossing point using a predictive control algorithm in both the continuous conduction mode (CCM) and discontinuous conduction mode (DCM). The line current in single-phase PFC topology is distorted at the zero crossing point of the input AC voltage because of the characteristic of the general proportional integral (PI) current controller. This distortion degrades the line current quality, such as the total harmonic distortion (THD) and the power factor (PF). Given the optimal duty cycle calculated by estimating the next state current in both the CCM and DCM, the proposed predictive control algorithm has a fast dynamic response and accuracy unlike the conventional PI current control method. These advantages of the proposed algorithm lower the line current distortion of PFC topology. The proposed method is verified through PSIM simulations and experimental results with 1.5 kW bridgeless PFC (BLPFC) topology.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 2005년도 춘계학술대회 학술발표 논문집 제15권 제1호
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• pp.185-188
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• 2005

This paper suggests a control method for efficient topology/parameter evolution in a bond-graph-based GP design framework that automatically synthesizes designs for multi-domain, lumped parameter dynamic systems, We adopt a hierarchical breeding control mechanism with fitness-level-dependent differences to obtain better balancing of topology/parameter search - biased toward topological changes at low fitness levels, and toward parameter changes at high fitness levels. As a testbed for this approach, an eigenvalue assignment problem, which is to find bond graph models exhibiting minimal distance errors from target sets of eigenvalues, was tested and showed improved performance for various sets of eigenvalues.