• Progress in Superconductivity
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• 제6권2호
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• pp.104-107
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• 2005

We have developed and tested an RSFQ 4-bit Arithmetic Logic Unit (ALU) based on half adder cells and de switches. ALU is a core element of a computer processor that performs arithmetic and logic operations on the operands in computer instruction words. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. We have simulated the circuit by using Josephson circuit simulation tools in order to reduce the timing problem, and confirmed the correct operation of the designed ALU. We used simulation tools of $XIC^{TM},\;WRspice^{TM}$, and Julia. The fabricated 4-bit ALU circuit had a size of $\3000{\ cal}um{\times}1500{\cal}$, and the chip size was $5{\cal} mm{\times}5{\cal}mm$. The test speeds were 1000 kHz and 5 GHz. For high-speed test, we used an eye-diagram technique. Our 4-bit ALU operated correctly up to 5 GHz clock frequency. The chip was tested at the liquid-helium temperature.

• Journal of Advanced Marine Engineering and Technology
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• 제5권1호
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• pp.12-19
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• 1981

As the fuel oil cost covers from 45% to 60% of the total expenditure for fishing boat operation, the energy saving is now an urgent problem to be taken a countermeasure for engineers, manufacturers or specialists engaging in this field. Undertaking a second-hand engine of the trainging ship, the author made several reconstructions to restore its performances. By inserting foot linears of connecting rods the compression ratio was increased and by adjusting both the fuel injection timing and the cooling water outlet temperature, its thermal efficiency was improved. The results of the experimental operation were summarized as follows. 1. By raising the piston top position 0.75mm more than the value of the operating manual, the compression pressure increased 1.3 kg/$cm^2$ and the maximum pressure did 3.4 kg/$cm^2$ at 75% load. 2. At 75% load, the difference of the maximum pressure between each cylinder was decreased from 2.4 kg/$cm^2$ to 1.8 kg/$cm^2$. 3. The fuel consumption was decreased about 8 g/ps.h at 75% load, and about 5.3 g/ps.h at 85% load. 4. The brake thermal efficiency was improved about 1.5% at 75% load and 0.9% at 85% load.

• 한국정보통신학회논문지
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• 제22권9호
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• pp.1257-1263
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• 2018

경량 사물인터넷 디바이스 상에서의 암호화 구현은 정확하고 빠르게 연산을 수행하여 서비스의 가용성을 높이는 것이 중요하다. 특히 곱셈 연산은 RSA, ECC, 그리고 SIDH와 같은 공개키 암호화에 활용되는 핵심 연산으로 최적화된 구현이 요구된다. 하지만 최신 저전력 프로세서인 ARM Cortex-M3 프로세서의 경우에는 곱셈연산 입력 크기에 따라 수행속도가 달라지는 보안 취약점을 가지고 있다. 수행속도가 달라지게 될 경우 연산 시간의 차이점을 확인하여 비밀정보를 추출하는 것이 가능하다. 이를 보완하기 위해 최근 연구에서는 고정된 연산 시간 안에 곱셈 연산을 수행하는 기법이 제안되었다. 하지만 해당 구현에서는 여전히 속도가 완전히 최적화되어 있지 않다. 본 논문에서는 기존에 제안된 곱셈연산을 보다 효율적으로 연산하기 위한 기법을 제안한다. 제안된 기법은 기존 방식에 비해 연산 속도를 최대 25.7% 향상시킨다.

• 드라이브 ㆍ 컨트롤
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• 제16권2호
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• pp.15-21
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• 2019

In this study, the maximum system efficiency of the electro-hydrostatic actuators was experimentally investigated, where small size external gear pumps with volumetric displacement under 1.3 cc/rev were combined with a 400W servomotor as the prime mover. Since the efficiency data of the servomotor, gear pumps and hydraulic cylinder were not provided by the suppliers, experimental apparatuses for their efficiency measurement were extra built up. When a gear pump with a volumetric displacement of 1.27cc/rev was used on an electro-hydrostatic actuator system, the maximum system efficiency was not higher than 70%. This was because the most effective operation ranges of the motor and pump did not coincide each other. In order to match their operation ranges as one of the most crucial design factors, a speed reduction mechanism can be used, such as a timing belt. It was shown in the study that the maximum system efficiency could be increased from 70% to 76% in that way.

• 한국통신학회논문지
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• 제35권11B호
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• pp.1579-1587
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• 2010

본 논문에서는 40G/100G 이더넷의 구조적 특징을 고려하여 PCS(Physical Coding Sublayer) 송수신부를 설계하고 로직 시뮬레이션을 통하여 각 모듈의 기능을 검증한다. 이를 위하여 PCS 송수신부의 기능 모듈 및 입출력 신호를 정의하고 HDL 프로그래밍 언어를 사용하여 각 가능을 구현하였다. 설계한 PCS 송수신부는 64B/66B 인코딩과 디코팅, 동작 모드에 따른 스크램블링과 디스크램블링, 송수신 프레임의 유효성 여부 판단 기능, 다중 레인 분배 및 정렬 기능을 제공한다. 설계한 PCS 송수신부의 기능 검증을 위하여 ModelSim 시뮬레이터를 이용하였으며, 입력 데이터에 따른 모듈 동작 및 타이밍 관점에서 기능을 확인하였다. 이를 통하여 설계한 PCS 송수신부의 각 기능 모듈에 올바르게 동작함을 확인할 수 있었다.

• 전자공학회논문지A
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• 제32A권12호
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• pp.108-114
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• 1995

Recently, along wtih the advance of high-performance system, synchronous DRAM's (SDRAM's) which provide consecutive data output synchronized with an external clock signal, have been reported. However, in the conventional SDRAM's which utilize a multi-stage serial pipelined scheme, the column path is divided into multi-stages depending on CAS latency N. Thus, as the operating speed and CAS latency increase, new stages must be added, thereby causing a large area penalty due to additinal latches and I/O lines. In the proposed register-based parallel pipelined scheme, (N-1) registers are located between the read data bus line pair and the data output buffer and the coming data are sequentially stored. Since the column data path is not divided and the read data is directly transmitted to the registers, the busrt read operation can easily be achieved at higher frequencies without a large area penalty and degradation of internal timing margin. Simulation results for 0.32um-Tech. 4-Bank 64M SDRAM show good operation at 200MHz and an area increment is less than 0.1% when CAS latency N is increased from 3 to 4.. This pipelined scheme is more advantageous as the operating frequency increases.

• 한국수소및신에너지학회논문집
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• 제28권6호
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• pp.691-696
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• 2017

An experimental study on engine performance and emission characteristics for bio-alcohol fuels considered as RFS fuel. The Bio-alcohol fuel were mixed ethanol and butanol and used in a 1.8 liter mpi engine. The efficiency of the BSFC is excellent in the maximum torque operation condition and the part load operation condition. As the bio-alcohol mixing ratio increased, the lambda <1 and ignition timing advanced $5^{\circ}CA$. As the mixing concentration increased, NOx emission increase and $CO_2$ emission decreased.

• 대한교통학회지
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• 제7권2호
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• pp.71-87
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• 1989

The objectives of this study are first, to evaluate the actual performance of the Transportation Impact Assesment System of Korea, second, to find the institutional problems of the system, and third, to seek for the best improvement of the system. Total 70 assessment reports performed in 1988 and judgements of the municipal councils of the reports were inspected. And the legal system of all levels were reviewed. According to the results, there are some needs to expand the number of cities subject to the assessment system. And the several regulations about the qualification of the agents assessing transportation impacts, the composition and operation of the municipal councils, and the timing of assessing the impacts are turned out improper. A proper alternative of amendment of the regulations are recommended. And the establishment of central council for judging assessments of hudge facilities, adoption of joint assessment of facilities bellow the standard, post occupancy assess ent, and transportation fee system were also recommended.

• Advances in pediatric surgery
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• 제3권2호
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• pp.164-167
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• 1997

Conjoined twins are one of the rarest and most challenging congenital anomalies in pediatric surgery. Successful surgical separation is difficult because it the majority of conjoined twins in is technically typical to separate shared vital organs successfully. The timing of separation is variable, but separation is usually delayed until such infants are relatively mature(i.e, 9-12 months of age). Operative survival was 50 % in the neonatal period, but 90 % in those over 4 months of age. The present case was successfully separated early beacase of cardiac problems in one of the twins. These twins were omphalopagus and only the liver was shared through a bridge. The vascular and biliary trees were independent from each other. Successful surgical separation was on 11th day of life, but one died of sepsis 18 days after operation.

• 한국경영과학회:학술대회논문집
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• 한국경영과학회/대한산업공학회 2005년도 춘계공동학술대회 발표논문
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• pp.715-722
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• 2005

Disassembly scheduling is the problem of determining the quantity and timing of disassembling used products while satisfying the demand of their parts or components over a planning horizon. The case of single product type with assembly structure is considered for the objective of minimizing the sum of disassembly operation and inventory holding costs. In particular, the resource capacity constraint is explicitly considered. The problem is formulated as an integer programming model, and a two-stage heuristic with construction and improvement algorithms is suggested in this paper. To show the performance of the heuristic, computational experiments are done on a number of randomly generated problems, and the test results show that the algorithm can give near optimal solutions within a very short amount of computation time.