• Journal of Sensor Science and Technology
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• v.23 no.1
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• pp.24-28
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• 2014

A lock-in amplifier was proposed for capacitive sensor applications. This amplifier was based on a general-purpose microcontroller and had only a charge amplifier as analog circuits. All the other functions of lock-in amplifier except for the charge amplifier were implemented with firmware and the internal resources of the microcontroller. A rectangular signal, generated by the microcontroller, was used in a sensor-driving signal instead of a conventional sinusoidal signal. This makes it possible that the phase comparison circuit in the lockin amplifier is made with analog-to-digital converter, a timer and an interrupt controller. Using the oversampling method and the rectangular driving signal, we can make it easy to implement the peak detection function with software and sample the peak-to-peak signal at charge amplifier output. A charge amplifier was proposed to cancel out the base capacitance existing in capacitive sensors structurally. The experimental results show that the lock-in amplifier operating in the supply voltage of 3.0 V cancels out the base capacitance and has good linearity.

• The Journal of the Korea Contents Association
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• v.11 no.9
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• pp.45-53
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• 2011

According to the necessity of measuring equipments for advanced military systems, real-time characteristics such as time determinism and execution accuracy pursuing low-latencies have become very important. With this reason, the market demand for real-time features in the general purpose operating system such as Linux has been enlarging. To meet these requirements, RTLinux and RTAI has been developed as dual-kernels based on Linux. However, developers should use assembler languages to facilitate real-time in RT-Linux, it is very difficult to deal with it. RTAI has disadvantage that it only provides soft real-time. To solve these problems, RTiK-Linux was developed. In this paper, we propose a new dual-kernel with hard real-time capabilities in Linux, called RTiK-Linux(Real-Time implemented Kernel for Linux). We first introduce related researches and then describe the design methodologies to guarantee the resolution which almost accords with the timer settings. Finally, we present the results of experimental measurements and analyze them in order to validate and evaluate the proposed RTiK-Linux.

• Journal of the Korea Society of Computer and Information
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• v.12 no.5
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• pp.103-112
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• 2007

In this paper, we implement a hypervisor that runs multiple uC/OS-II real-time kernels on one microprocessor. The hypervisor virtualizes microprocessor and memory that are main resources managed by uC/OS-II kernel. Microprocessor is virtualized by controlling interrupts that uC/OS-II real-time kernel handles and memory is virtualized by partitioning physical memory. The hypervisor consists of three components: interrupt control routines that virtualize timer interrupt and software interrupt, a startup code that initializes the hypervisor and uC/OS-II kernels, and an API that provides communication between two kernels. The original uC/OS-II kernel needs to be modified slightly in source-code level to run on the hypervisor. We performed a real-time test and an independent computation test on Jupiter 32-bit EISC microprocessor and showed that the virtualized kernels run without problem. The result of our research can reduce the hardware cost, the system space and weight, and system power consumption when the hypervisor is applied in embedded applications that require many embedded microprocessors.

• The Journal of the Acoustical Society of Korea
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• v.28 no.3
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• pp.229-238
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• 2009

This paper describes a sound engine of Korean traditional instruments, which are the Gayageum and Taepyeongso, by using a TMS320F2812. The Gayageum and Taepyeongso models based on commuted waveguide synthesis (CWS) are required to synthesize each sound. There is an instrument selection button to choose one of instruments in the proposed sound engine, and thus a corresponding sound is produced by the relative model at every certain time. Every synthesized sound sample is transmitted to a DAC (TLV5638) using SPI communication, and it is played through a speaker via an audio interface. The length of the delay line determines a fundamental frequency of a desired sound. In order to determine the length of the delay line, it is needed that the time for synthesizing a sound sample should be checked by using a GPIO. It takes $28.6{\mu}s$ for the Gayageum and $21{\mu}s$ for the Taepyeongso, respectively. It happens that each sound sample is synthesized and transferred to the DAC in an interrupt service routine (ISR) of the proposed sound engine. A timer of the TMS320F2812 has four events for generating interrupts. In this paper, the interrupt is happened by using the period matching event of it, and the ISR is called whenever the interrupt happens, $60{\mu}s$. Compared to original sounds with their spectra, the results are good enough to represent timbres of instruments except 'Mu, Hwang, Tae, Joong' of the Taepyeongso. Moreover, only one sound is produced when playing the Taepyeongso and it takes $21{\mu}s$ for the real-time playing. In the case of the Gayageum, players usually use their two fingers (thumb and middle finger or thumb and index finger), so it takes $57.2{\mu}s$ for the real-time playing.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.17 no.3
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• pp.155-162
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• 2018

Delta robots are usually used for industrial manufacturing, but heavy weight and expensive price have been obstacles to rapid propagation of robots in the field. The goal of this research is to make light-weight and price-competitive delta robots. To reduce the weight, we used plastic material for the arm link, and to reduce the price, we used a step-motor as the main actuator. First we formulated the equations of inverse kinematics for the designed delta robot and then verified these equations by using multibody-dynamics simulation. An algorithm of motion control was developed and applied to the motion-processing unit using a timer-interrupt of 8 milliseconds. Finally, we tested the performance of the new delta robot by checking its control of motion along line segments.

• The Transactions of the Korea Information Processing Society
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• v.3 no.5
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• pp.1229-1239
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• 1996

The increase of additional information broadcasting of TV demands a graphic overlay processor. This paper is about the design, implementation and testing of a graphic overlay processor called by KBPS decoder ASSP (Applicatio n Specific Standard Product) which is compliance with Korea Broadcast Programming System. KBPS decoder ASSP consists of embedded 8 bit microprocessor Z80, graphic overlay controller, KBPS schedule decoder, memory controller, priority interrupt controller, MIDI controller, infrared raccoon receiver, async scrial communication controller, timer, bus controller, universal parallel input-output port and serial-parallel interface. The 0.8 micron CMOS Sea of Gate is used to implement the ASSP in amount of about 31,500 gates, and it is running at 14.318MHz.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.19 no.8
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• pp.81-87
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• 2020

A stable rotational-to-linear motion transformation structure using a driving mechanism with 2 degrees of freedom was developed for an orthogonal mechanism to prevent the interference of each axis in 2D motion. In this mechanism, a step motor was used for precise position control. This structure was developed to maneuver workparts in micro particle blast machining experiments. To determine the real-time performance of micro particle blast machining, the control, input, and output were operated simultaneously and precise position control was implemented, using a timer interrupt with multiple execution codes. The two step motors obtained precise position control by removing backlash with a ball-screw mechanism. The device has menu-type control codes for user-friendliness, and real-time sequence control was simultaneously adopted for user control input.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.34 no.2
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• pp.101-105
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• 2006

The Engineering Model of STSAT-2 on-board computer(OBC) was developed and tested completely with other sub-systems. The on-board computer of STSAT-2 has a high- performance PowerPC processors and a structure of centralized network communication. In addition, a lot of logics are implemented by Field Programmable Gate Array, such as interrupt controller, watchdog timer and UART. It could make the weight and size of OBC lighter and smaller. Also, the STSAT-2 on-board computer has more improved tolerance against Single Event Upsets and faults than that of the STSAT-1.

• Proceedings of the KSRS Conference
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• 2003.11a
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• pp.1096-1098
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• 2003

SBC(Single Board Computer) is being developed for MSC(Multi-Spectral Camera) on KOMPSAT-2(Korea Multi-Purpose Satellite). SBC controls all the units of MSC system and gets commands and sends telemetry to and from spacecraft bus via 1553 communication channel. Due to the fact that SBC does very important roles for MSC system operation and SBC operates with 100% duty cycle, SBC is designed to have high reliability. SBC which has Intel 80486 as a main processor includes eight serial communication channels, one mil-std-1553 interface channel and several discrete interfaces. SBC incorporates 2Mbyte radiation hardened SRAM(Static Random Access Memory) and 1Mbyte flash memory. There are also PIC(Programmable Interrupt Controller), counter, WDT(Watch Dog Timer) in the SBC. In this paper, the design result of the SBC is presented.

• Journal of IKEEE
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• v.23 no.3
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• pp.1068-1076
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• 2019

Most of the electronics we use today have built-in microcontrollers, which are called embedded systems. In such a small environment, responsiveness is very important for the microcontroller. In this paper, the basic input/output control, timer/counter interrupt operation principle, and understanding of the microcontroller are described. Program logic is proposed to improve throughput and latency by controlling characteristics of service routine and program execution order. The hardware simulations in this paper were verified using ATmega128 and PIC16F877A from Atmel and Microchip.