• Title/Summary/Keyword: Time Synchronous

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Action of Synchronous error between Z axis and spindle axis on rigid tapping (Rigid 탭핑에서의 Z축과 주축간 동기오차의 거동)

  • 이돈진;강지웅;김용규;김선호;김화영;안중환
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2000.11a
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    • pp.184-187
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    • 2000
  • This paper describes action of synchronous error between z axis and spindle axis on rigid tapping. Because rigid tapping cuts the threads synchronizing the movement of z axis to spindle rotation, synchronous error between z axis and spindle is very important. Increase of synchronous error degrades the accuracy of thread and crushes the tap in worst case. So we developed the realtime measurement system of synchronous error in order to know the action of synchronous error on rigid tapping. In result, we have known that synchronous error was increased according to rise of spindle speed and z axis speed. And because the cutting torque(M3-30Ncm∼M10-300Ncm) on rigid tapping are less than maximum motor torque(3500Ncm), it specially doesn't affect the synchronous error. The most important parameter which has affected the increase of synchronous error was acceleration/deceleration time. On worst case, spindle motor was tripped because of the excess of synchronous error. Because the acceleration/deceleration time ocuupies the most of the total cutting time, in order to move on the high speed rigid tapping, the acceleration/deceleration time of spindle must be remarkably reduced.

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A Study on the Real Time Digital Field Time-Constant Regulator for Micro-Synchronous Machine (축소형 동기발전기 실시간 디지털 계자시정수 보상장치에 관한 연구)

  • Kim, Dong-Joon;Moon, Young-Hwan;Hwang, Chi-U
    • Proceedings of the KIEE Conference
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    • 1997.11a
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    • pp.253-256
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    • 1997
  • This paper describes a novel design method for compensating field time-constant of micro-synchronous machine so that its terminal flux can show the same characteristics as large-scale synchronous machine's. In addition to it, the suggested design method can determine the field time-constant regulator's parameters considered the nonlinearities of micro-synchronous machine such as saturation and loading effect. This method applied to 5kVA micro-synchronous machine, and the digital time-constant regulator with digital AVR were designed such that the short field time-constant, $T_{do}'=1.12\;sec$, can take on the large-scale synchronous machine time constant, $T_{do}'=1.47\;sec$. After determining the parameters of controllers, the real time digital time-constant regulator and digital AVR algorithm were implemented by using the PC with Penumum processor, and the usefulness of suggested real time digital time-constant regulator was verified by observing its good performance on the excitation of micro-synchronous machine.

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Design of Inter-Regional Instrument Group-B Decoder Based on FPGA for Time Synchronous (시각동기를 위한 FPGA 기반의 Inter-Regional Instrument Group-B 디코더 설계)

  • Kim, Hoon Yong;Yang, Oh
    • Journal of the Semiconductor & Display Technology
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    • v.18 no.1
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    • pp.59-64
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    • 2019
  • Recently, time synchronous has become important for satellite launch control facilities, multiple thermal power plants, and power system facilities. Information from time synchronous at each of these industrial sites requires time synchronization to control or monitor the system with correlation. In this paper, IRIG-B codes, which can be used for time synchronous, are used as specifications in IRIG standard 200-16. Signals from IRIG-B120 (Analog), IRIG-B000 (Digital), and one PPS are output from GPS receiver. Using the signal from IRIG-B120 (Analog), it passes through the signal from the analog amplifier and generates one PPS signal using the field-programmable gate array. The FPGA is used cyclone EPM570T100I5N. According to IEEE regulations, the error of one PPS is specified within 1us, but in this paper, the error is within 100ns. The output of the one PPS signal was then compared and tested against the one PPS signal on the GPS receiver to verify accuracy and reliability. In addition, the proposed time synchronous is simple to construct and structure, easy to implement, and provides high time precision compared to typical time synchronous. The output of the one PPS signals and IRIG-B000 signal will be used in many industry sectors.

Real Time Simulator for a Permanent Magnet Synchronous Motor with Power Converter (전력변환기를 이용한 영구자석 동기전동기용 실시간 시뮬레이터)

  • Oh, Hyun-Cheal;Kim, Hag-Wone;Cho, Kwan-Yuhl
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.27 no.12
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    • pp.114-124
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    • 2013
  • Recently, the real time simulator to develop the inverter drive board and motor control algorithm for high power induction motor and PM synchronous motor is required. In this paper, the real time simulator based on the voltage control for a PM synchronous motor is proposed. The resistor, inductor, and the induced voltage for the modeling of a PM synchronous motor is implemented by the power converter including the LCL filter and the PWM rectifier. The induced voltage of a PM synchronous motor is simulated by the capacitor voltage of the LCL filter, which is controlled by PI voltage controller and the deadbeat current controller. The operation and the simulated characteristics of the proposed real time simulator for a PM synchronous motor is verified by the simulation.

Fixed Time Synchronous IPC in Zephyr Kernel (Zephyr 커널에서 고정 시간 동기식 IPC 구현)

  • Jung, Jooyoung;Kim, Eunyoung;Shin, Dongha
    • IEMEK Journal of Embedded Systems and Applications
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    • v.12 no.4
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    • pp.205-212
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    • 2017
  • Linux Foundation has announced a real-time kernel, called Zephyr, for IoT applications recently. Zephyr kernel provides synchronous and asynchronous IPC for data communication between threads. Synchronous IPC is useful for programming multi-threads that need to be executed synchronously, since the sender thread is blocked until the data is delivered to the receiver thread and the completion of data transfer can be known to two threads. In general, 'IPC execution time' is defined as the time duration between the sender thread sends data and the receiver thread receives the data sent. Especially, it is important that 'IPC execution time' in the synchronous IPC should be fixed in real-time kernel like Zephyr. However, we have found that the execution time of the synchronous IPC in Zephyr kernel increases in proportion to the number of threads executing in the kernel. In this paper, we propose a method to implement a fixed time synchronous IPC in Zephyr kernel using Direct Thread Switching(DTS) technique. Using the technique, the receiver thread executes directly after the sender thread sends a data during the remaining time slice of the sender thread and we can archive a fixed IPC execution time even when the number of threads executing in the kernel increases. In this paper, we implemented synchronous IPC using DTS in the Zephyr kernel and found the IPC execution time of the IPC is always 389 cycle that is relatively small and fixed.

Frequency Characteristics of the Synchronous-Frame Based D-Q Methods for Active Power Filters

  • Wang, Xiaoyu;Liu, Jinjun;Hu, Jinku;Meng, Yuji;Yuan, Chang
    • Journal of Power Electronics
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    • v.8 no.1
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    • pp.91-100
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    • 2008
  • The d-q harmonic detecting algorithms are dominant methods to generate current references for active power filters (APF). They are often implemented in the synchronous frame and time domain. This paper researches the frequency characteristics of d-q synchronous transformations, which are closely related to the analysis and design issues of control system. Intuitively, the synchronous transformation is explained with amplitude modulation (AM) in this paper. Then, the synchronous filter is proven to be a time-invariant and linear system, and its transfer function matrix is derived in the stationary frames. These frequency-domain models imply that the synchronous transformation has an equivalent effect of frequency transformation. It is because of this feature, the d-q method achieves band-pass characteristics with the low pass filters in the synchronous frame at run time. To simplify these analytical models, an instantaneous positive-negative sequence frame is proposed as expansion of traditional symmetrical components theory. Furthermore, the synchronous filter is compared with the traditional bind-pass filters based on these frequency-domain analytical models. The d-q harmonic detection methods are also improved to eliminate the inherent coupling effect of synchronous transformation. Typical examples are given to verify previous analysis and comparison. Simulation and experimental results are also provided for verification.

A Clock Monitoring Logic Suggestion at the Synchronous System (동기 시스템에서의 Clock Monitoring Logic 제안)

  • Yoon Joo-Yeong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.6 s.336
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    • pp.17-22
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    • 2005
  • It is important that we maintain the synchronous time-information with each other in the synchronous system. The most functions in the synchronous system need the time-information. n we have the wrong time-information, the system would operate incorrectly. So, we need to check if the time-information is correct or not in the important block of the synchronous system. In this paper, we will discuss how to check the clock signal and find some problem of it. Then, we will suggest the alternative plan.

A Study on the Efficiency Improvement of TTFC(Two Transistor Forward Converter) using Synchronous Rectifier of Compulsory Control-driver (동기정류기 강제구동 방식을 이용한 TTFC의 효율 향상에 관한 연구)

  • Bae, Jin-Yong;Kim, Yong;Lee, Eun-Young;Kwon, Soon-Do;Han, Kyung-Tae;Han, Dae-Hee
    • Proceedings of the KIEE Conference
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    • 2003.10b
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    • pp.166-170
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    • 2003
  • This paper presents the TTFC(Two Transistor Forward Converter) using Synchronous Rectifier of Compulsory Control-driver. The two transistor forward circuit is used to decrease voltage stress of primary side and the synchronous rectifier is used to reduce current stress of secondary side. Previous synchronous rectifier's MOSFET of TTFC have long dead time This paper presents synchronous rectifier of compulsory control-driver for minimized dead time. This paper compared with diode rectifier, self-driven synchronous rectifier and compulsory control-driver synchronous rectifier of TTFC. The principle of operation, feature and design considerations are illustrated and verified through the experiment with a 200W 100kHz MOSFET based experimental circuit.

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A Novel Dead-Time Compensation Method using Disturbance Observer

  • Youn, Myung-Joong;Moon, Hyung-Tae;Kim, Hyun-Soo
    • Journal of Power Electronics
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    • v.2 no.1
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    • pp.55-66
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    • 2002
  • A new on-line dead-time compensation method for a permanent magnet (PM) synchronous motor drive is proposed. Using a simple disturbance observer without any additional circuit and off-line experimental measurement, disturbance voltages in the synchronous reference dq frame caused by the dead time and non-ideal switching characteristics of power devices are estimated in an on-line manner and fed to voltage references in order to compensate the dead-time effects. The proposed method is applied to a PM synchronous motor drive system and implemented by using software of a digital signal processor (DSP) TMS320C31. Simulations and experiments are carried out for this system and the results well demonstrate the effectiveness of the proposed method.

An Improved Stationary Frame-based Digital Current Control Scheme for a PM Synchronous Motor

  • Kim Kyeong-Hwa;Youn Myung-Joong
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.174-178
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    • 2001
  • An improved stationary frame-based digital current control technique for a permanent magnet (PM) synchronous motor is presented. Generally, the stationary frame current controller is known to provide the advantage of a simple implementation. However, there are some unavoidable limitations such as a steady-state error and a phase delay in the steady-state. On the other hand, in the synchronous frame current regulator, the regulated currents are dc quantities and a zero steady-state error can be obtained through the integral control. However, the need to transform the signals between the stationary and synchronous frames makes the implementation of a synchronous frame regulator complex. Although the PI controller in the stationary frame gives a steady-state error and a phase delay, the control performance can be greatly improved by employing the exact decoupling control inputs for the back EMF, resulting in an ideal steady-state control characteristics irrespective of an operating condition as in the synchronous PI decoupling controller. However, its steady-state response may be degraded due to the inexact cancellation inputs under the parameter variations. To improve the control performance in the stationary frame, the disturbance is estimated using the time delay control. The proposed scheme is implemented on a PM synchronous motor using DSP TMS320C31 and the effectiveness is verified through the comparative simulations and experiments.

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