• 한국재료학회지
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• 제12권6호
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• pp.464-469
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• 2002

$SrBi_2Nb_2O_9(SBN)$ thin films were grown on Pt/Ti/Si and p-type Si(100) substrates by rf-magnetron co-sputtering method using two ceramic targets, $SrNb_2O_6\; and \;Bi_2O_3$. The structural and electrical characteristics have been investigated to confirm the possibility of the SBN thin films for the applications to destructive and nondestructive read out ferroelectric random access memory(FRAM). For the optimum growth condition X-ray diffraction patterns showed that SBN films had well crystallized Bi-layered perovskite structure after $700^{\circ}C$ heat-treatment in furnace. From this specimen we got remnant polarization $(2P_r)$ of about 6 uC/$\textrm{cm}^2$ and coercive voltage $(V_c)$ of about 1.5 V at an applied voltage of 5 V. The leakage current density was $7.6{\times}10^{-7}$/A/$\textrm{cm}^2$ at an applied voltage of 5V. And for the NDRO-FRAM application, properties of SBN films on Si substrate has been investigated. From transmission electron microscopy (TEM) analysis, we found the furnace treated sample had a native oxide about 2 times thicker than the RTA treated sample and this thick native oxide layer had a bad effect on C-V characteristics of SBN/Si thin film. After $650^{\circ}C$ RTA process, we got the improved memory window of 1.3 V at an applied voltage of 5 V.

• 한국전기전자재료학회논문지
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• 제17권8호
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• pp.875-881
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• 2004

Fundamental results obtained from an atomic force microscope (AFM) chemically-induced direct nano-lithography process are presented, which is regarded as a simple method for fabrication nm-scale devices such as superconducting flux flow transistors (SFFTs) and single electron tunneling transistors (SETs). Si cantilevers with Pt coating and with 30 nm thick TiO coating were used as conducting AFM tips in this study. We observed the surfaces of superconducting strip lines modified by AFM anodization' process. First, superconducting strip lines with scan size 2 ${\mu}{\textrm}{m}$${\times}$2 ${\mu}{\textrm}{m}$ have been anodized by AFM technology. The surface roughness was increased with the number of AFM scanning, The roughness variation was higher in case of the AFM tip with a positive voltage than with a negative voltage in respect of the strip surface. Second, we have patterned nm-scale oxide lines on ${YBa}-2{Cu}_3{O}_{7-x}$ superconducting microstrip surfaces by AFM conductive cantilever with a negative bias voltage. The ${YBa}-2{Cu}_3{O}_{7-x}$ oxide lines could be patterned by anodization technique. This research showed that the critical characteristics of superconducting thin films were be controlled by AFM anodization process technique. The AFM technique was expected to be used as a promising anodization technique for fabrication of an SFFT with nano-channel.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.67-67
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• 2008

Application of organic materials with low cost, easy fabrication and advantages of flexible device are increasing attention by research work. Recently, one of them, organic solar cells were rapidly increased efficiency with regioregular poly(3-hexylthiophene) (P3HT) and [6,6]-phenyl-C61-butyricacidmethylester (PCBM) used typical material. To increased efficiency of organic solar cell has tried control of domain of PCBM and crystallite of P3HT by thermal annealing and solvent vapor annealing. [4-6] In those annealing effects, be made inefficiently efficiency, which is increased fill factor (FF), and current density by phase-separated morphology with blended P3HT and PCBM. In addition, increased conductivity by modified hole transfer layer (HTL) such as Poly(3,4-ethylenedioxythiophene) poly(styrenesulfonate) (PEDOT:PSS), increased both optical and conducting effect by titanium oxide (TiOx), and changed cathode material for control work function were increased efficiency of Organic solar cell. In this study, we had described effect of organic photovoltaics by conductivity of interlayer such as PEDOT:PSS and TCO (Transparent conducting oxide) such as ITO, which is used P3HT and PCBM. And, we have measured with exactly defined shadow mask to study effect of solar cell efficiency according to conductivity of hole transfer layer.

• 대한전자공학회논문지SD
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• 제39권5호
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• pp.1-7
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• 2002

Deep sub-micron bulk CMOS circuits require gate electrode materials such as metal silicide and titanium silicide for gate oxides. Many authors have conducted research to improve the quality of the sub-micron gate oxide. However, few have reported on the electrical quality and reliability of an ultra-thin gate. In this paper, we will recommend a novel shallow trench isolation structure and a two-step TiS $i_2$ formation process to improve the corner metal oxide semiconductor field-effect transistor (MOSFET) for sub-0.1${\mu}{\textrm}{m}$ VLSI devices. Differently from using normal LOCOS technology, deep sub-micron CMOS devices using the novel shallow trench isolation (STI) technology have unique "inverse narrow-channel effects" when the channel width of the device is scaled down. The titanium silicide process has problems because fluorine contamination caused by the gate sidewall etching inhibits the silicide reaction and accelerates agglomeration. To resolve these Problems, we developed a novel two-step deposited silicide process. The key point of this process is the deposition and subsequent removal of titanium before the titanium silicide process. It was found by using focused ion beam transmission electron microscopy that the STI structure improved the narrow channel effect and reduced the junction leakage current and threshold voltage at the edge of the channel. In terms of transistor characteristics, we also obtained a low gate voltage variation and a low trap density, saturation current, some more to be large transconductance at the channel for sub-0.1${\mu}{\textrm}{m}$ VLSI devices.

• Journal of Welding and Joining
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• 제29권1호
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• pp.65-73
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• 2011

Microstructural characteristics of two high strength (600 MPa & 800 MPa) weld metals produced by flux-cored arc welding process (FCAW) were evaluated. The 600 MPa grade weld metal was consisted of 75% acicular ferrite and 25% ferrite which was formed at relatively high temperature (grain boundary ferrite, widmanstatten ferrite, polygonal ferrite). However, the 800 MPa grade weld metal was composed of about 85% acicular ferrite and 15% low temperature forming phases (bainite, martensite). The prior austenite grain size of 800 MPa grade weld metal was decreased by solute drag force. The compositions and sizes of inclusions which are the dominant factors for the formation of acicular ferrite were analyzed by a transmission electron microscopy (TEM). In both 600 MPa and 800MPa grade weld metals, the inclusions were mainly consisted of Ti-oxide and Mn-oxide, and the average size of inclusions was $0.7{\mu}m$. The 800 MPa grade weld metal exhibited higher tensile strength and similar toughness compared with the 600 MPa grade weld metal. This result is mainly due to a higher fraction of low temperature products and a lower fraction of grain boundary ferrite in the 800 MPa grade weld metal.

• Journal of Electrical Engineering and Technology
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• 제5권4호
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• pp.640-645
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• 2010

This paper describes the power generating property of hydrothermally grown ZnO nanorods on a flexible polyethersulfone (PES) substrate. The piezoelectric currents generated by the ZnO nanorods were measured when bending the ZnO nanorod by using I-AFM, and the measured piezoelectric currents ranged from 60 to 100 pA. When the PtIr coated tip bends a ZnO nanorod, piezoelectrical asymmetric potential is created on the nanorod surface. The Schottky barrier at the ZnO-metal interface accumulates elecntrons and then release very quickly generating the currents when the tip moves from tensile to compressed part of ZnO nanorod. These ZnO nanorods were grown almost vertically with the length of 300-500 nm and the diameter of 30-60 nm on the Ag/Ti/PES substrate at $90^{\circ}C$ for 6 hours by hydrothermal method. The metal-semiconductor interface property was evaluated by using a HP 4145B Semiconductor Parameter Analyzer and the piezoelectric effect of the ZnO nanorods were evaluated by using an I-AFM. From the measured I-V characteristics, it was observed that ZnO-Ag and ZnO-Au metal-semiconductor interfaces showed an ohmic and a Schottky contact characteristics, respectively. ANSYS finite element simulation was performed in order to understand the power generation mechanism of the ZnO nanorods under applied external stress theoretically.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2013년도 추계학술대회
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• pp.722-725
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• 2013

본 연구에서는 열처리를 하지 않은 소자와 열처리 소자의 기본 특성을 비교, 분석하고 온도에 따른 특성 변화를 확인하였다. 사용된 소자는 상부전극이 Pt/Ti(150nm), 하부전극은 Pt(150nm), 산화층은 $HfO_2$(70nm)이고, 열처리 온도는 $500^{\circ}C$, $850^{\circ}C$ 이다. 측정 소자 성능은 Set/Reset 전압, sensing window(저항상태 차이)다. 측정결과 세 종류의 소자의 기본 특성은 열처리별 온도가 높을수록 Set/Reset전압과 sensing window가 증가하였다. 온도에 따른 기본특성 분석 실험 결과 온도가 증가함에 따라 Set/Reset전압과 sensing window가 감소하였다. Set/Reset 전압의 온도에 따른 변화율은 $850^{\circ}C$ 열처리한 소자가 제일 작았고, sensing window의 변화율은 $500^{\circ}C$ 열처리 소자에서 가장 작은 변화율을 보였다. Set/Reset 전압의 변화율 과 sensing window를 고려했을 때 $500^{\circ}C$ 열처리 소자가 좋은 메모리 특성을 보였다.

• Advances in Energy Research
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• 제5권3호
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• pp.219-226
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• 2017

Electrochemical double layer capacitors (EDLCs) have received a tremendous interest due to their suitability for diverse applications. They have been fabricated using different carbon based electrodes including activated carbons, single walled/multi walled carbon nano tubes. But, graphite which is one of the natural resources in Sri Lanka has not been given a considerable attention towards using for EDLCs though it is a famous carbon material. On the other hand, EDLCs are well reported with various liquid electrolytes which are associated with numerous drawbacks. Gel polymer electrolytes (GPE) are well known alternative for liquid electrolytes. In this paper, it is reported about an EDLC fabricated with a nano composite polyethylene oxide based GPE and two Sri Lankan graphite based electrodes. The composition of the GPE was [{(10PEO: $NaClO_4$) molar ratio}: 75wt.% PC] : 5 wt.% $TiO_2$. GPE was prepared using the solvent casting method. Two graphite electrodes were prepared by mixing 85% graphite and 15% polyvinylidenefluoride (PVdF) in acetone and casting n fluorine doped tin oxide glass plates. GPE film was sandwiched in between the two graphite electrodes. A non faradaic charge discharge mechanism was observed from the Cyclic Voltammetry study. GPE was stable in the potential windows from (-0.8 V-0.8 V) to (-1.5 V-1.5 V). By increasing the width of the potential window, single electrode specific capacity increased. Impedance plots confirmed the capacitive behavior at low frequency region. Galvanostatic charge discharge test yielded an average discharge capacity of $0.60Fg^{-1}$.

• 한국전기전자재료학회논문지
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• 제33권6호
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• pp.445-449
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• 2020

Non-volatile memory is approaching its fundamental limits with the Si₃N₄ storage layer, necessitating the use of alternative materials to achieve a higher programming/erasing speed, larger storage window, and better data retention at lower operating voltage. This limitation has restricted the development of the charge-trap memory, but can be addressed by using high-k dielectrics. The paper reviews the doping of nitrogen, titanium, and yttrium on high-k dielectrics as a storage layer by comparing MONOS devices with different storage layers. The results show that nitrogen doping increases the storage window of the Gd₂O₃ storage layer and improves its charge retention. Titanium doping can increase the charge capture rate of HfO₂ storage layer. Yttrium doping increases the storage window of the BaTiO₃ storage layer and improves its fatigue characteristics. Parameters such as the dielectric constant, leakage current, and speed of the memory device can be controlled by maintaining a suitable amount of external impurities in the device.

• 한국전기전자재료학회논문지
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• 제32권6호
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• pp.501-506
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• 2019

To overcome the limitations of the conventional Ni anode-supported SOFCs, various types of ceramic anodes have been studied. However, these ceramic anodes are difficult to commercialize because of their low cell performances and difficulty in manufacturing anode-support typed SOFCs. Therefore, in this study, to use these ceramic anodes and take advantage of anode-supported SOFC, which can minimize ohmic loss from the thin electrolyte, we fabricated cathode support-typed SOFC. The cathode-support of LSCF-YSZ was prepared by the acid treatment of conventional Ni-YSZ (Yttria-stabilized Zirconia) anode-support, followed by the infiltration of LSCF to YSZ scaffold. The composite of $La(Sr)Ti(Ni)O_3$ and $Ce(Mn,Fe)O_2$ was used as the ceramic anode. The fabricated cathode-supported button cell showed a relatively low power density of $0.207Wcm^{-2}$ at $850^{\circ}C$; however, it is expected to show better performance through the optimization of the infiltration rate and thickness of LSCF-YSZ cathode-support layer.