• 대한안전경영과학회지
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• 제19권4호
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• pp.43-52
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• 2017

The purposes of this study are to analyze risks of construction step BIM(Building Information Modeling) applied project and improve it. Recently, construction industry has emphasized an importance of BIM for efficient utilization of various information. In the whole life cycle of huge construction project, there are cases introducing BIM and projects applying BIM are gradually increased to the work of construction step. However, the process of communication is not established, so the contents of BIM process of construction step are just showing rough fields and concepts of working utilization, so it's restrictive to utilize BIM actively on constructions step. Through results of case study in this research, constructor risks of BIM business should be efficiently treated with Fuzzy-FMEA that is more precise than existing danger evaluation.

• Journal of Positioning, Navigation, and Timing
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• 제10권4호
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• pp.387-393
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• 2021

This paper proposes a system to synchronize the time of computers over an unmanned aerial vehicle (UAV) network. With the proposed system, the UAVs can perform missions that require precise relative time. Also, data collected by UAVs can be fused precisely with synchronized time. In the system, to synchronize the time of all computers over the UAV network, two-step synchronization is performed. In the first step, the mission computers of the UAVs are synchronized through the server of the system. After the first step, the mission computers measure time offset between the time of the mission computers and the flight computers. The offset values are delivered to the server. In the second step, virtual time is determined by the server from the collected time offset. The measured offset is compensated by moving the synchronized time of mission computers to the reasonable virtual time. Since only the time of mission computers are controlled, any flight computers that use micro air vehicle link (MAVLink) protocol can be synchronized in the proposed system.

• Journal of Power Electronics
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• 제19권5호
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• pp.1069-1073
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• 2019

In this paper, an alternative non-isolated DC-DC converter with a high voltage boosting capability is proposed. Two inductors are used and one of them has its flux linkage increases during its charging period to achieve a high step-up voltage gain. Among the three integrated capacitors, one portrays the partial characteristic of the switched-capacitor technique, while the other two are connected in series across the load. With the two switches controlled using the same duty cycle, the proposed topology demonstrates the merits of a higher and wider range of step-up voltage gain when compared with recent topologies. In addition, a reduction in loss is induced and a higher efficiency is ensured with all the voltage stresses constrained within the output voltage. Operation of the proposed converter is analyzed and validated through experimental results obtained with a prototype.

• Journal of Electrical Engineering and information Science
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• 제1권2호
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• pp.119-124
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• 1996

Variable step size LMS(VS-LMS) algorithms improve performance of LMS algorithm by means of varying the step size. This paper presents a new VS-LMS algorithm using normalized absolute estimation error. Normalizing the estimation error to the expected valus of the desired signal, we determined the step size using the relative size of estimation error, Because parameters and computational load are less, our algorithm is easy to implement in hardware. The performance of the proposed algorithm is analyzed theoretically and estimated through simulations. Based on the theoretical analysis and computer simulations, the proposed algorithm is shown to be effective compared to conventional VS-LMS algorithms.

• 전력전자학회논문지
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• 제11권3호
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• pp.209-215
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• 2006

본 논문에서는 전압원 인버터의 출력전압 파형을 개선하여 PWM방식을 사용할 수 없는 중 대용량급 모터드라이버 및 UPS, STATCOM, SVC등에 적용하기 위한 새로운 3상 전압원 24-스텝 인버터를 제안한다 보조회로로서 사용한 컨버터로 리플전압을 발생시키고 이를 기존의 12-스텝 인버터에 주입하는데 한대의 링크를 사용하면 12-스텝 동작이 24-스텝으로 전환되며 보조 변압기의 1차 권선을 2N(N=1,2,3...)으로 늘리면 12M-스텝(M=2,3,4..)으로 전환된다. 본 방식의 타당성을 실험 및 시뮬레이션을 통하여 입증하였다.

• 한국정보과학회논문지:소프트웨어및응용
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• 제31권11호
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• pp.1455-1473
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• 2004

본 연구는 객체 재사용과 재공학을 위해 레거시 시스템의 인터페이스 정보로부터 의미 있는 정보를 추출하고 새로운 시스템에 통합될 수 있도록 하기 위한 기존 레거시 시스템의 인터페이스에 기반 한 객체추출 기법을 제안한다. 본 논문에서 제안하는 객체추출 기법은 인터페이스 사용 사례 분석 단계, 인터페이스 객체 분할 단계, 객체구조 모델링 단계, 객체 모델 통합 단계 등 4단계로 구성되어 있다. 인터페이스 사용 사례 분석 단계는 인터페이스 구조 그리고 레거시 시스템과 사용자간의 상호작용 등의 정보를 획득하는 단계이다. 인터페이스 객체분할 단계는 인터페이스 정보를 의미 있는 필드들로 구분하는 단계이며, 객체구조 모델링 단계는 인터페이스 객체들 간의 구조적 관계와 협력 관계를 파악하여 모델링하는 단계이다. 마지막으로 객체 모델 통합 단계는 객체 단위의 단위 모델들을 통합하여 추상화된 정보를 포함한 상위 수준의 통합 모델을 유도하는 단계다. 객체추출 기법에 의해 생성된 객체 통합 모델은 역공학 기술자들의 레거시 시스템 이해와 레거시 시스템의 정보를 새로운 시스템에 적용하는데 있어 좀 더 용이한 효율성을 제공한다.

• 전기학회논문지P
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• 제63권4호
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• pp.361-367
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• 2014

This paper is related to a new solar power conditioner for a built-in step-up chopper function. In the first step-up chopper proposed solar PV power conditioner for mutually connected in series with the input voltage of the bypass diodes are respectively connected to the positive terminal should install the mutual boosting chopper diode connected in series with the boost chopper switching element between the two power supply and at the same time the first and the second was connected to a second diode and a resonance inductor and a snubber capacitor in series with each other. And the common connection point between the bypass diode and the step-up chopper and the step-up chopper diode common connection point of the switching elements of the input voltage was set to the boost inductor for storing energy. In addition, between the step-up chopper and the step-up chopper diode and a switching element of a joint connection point of the first auxiliary diode and the second common connection point of the auxiliary diode was provided, the resonance capacitor. Between the step-up chopper and the step-up chopper diode and a switching element of a joint connection point and the common connection point of the resonance inductor snubber capacitor and connecting the third secondary diode, between two power supply lines is characterized by configuring the DC link capacitor bus lines in parallel. Therefore, it is possible to suppress the switching loss through, DC link bus lines, as well as there could seek miniaturization and weight reduction of the power conditioner itself by using a common capacitor of the non-polar non-polar electrolytic capacitor having a capacitor, the service life of the circuit can be extended and it is possible to greatly reduce the loss can be greatly improve the reliability of the product and the operation of the product itself.

• 공업화학
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• 제23권1호
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• pp.77-85
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• 2012

팽창진주암(expanded perlite)과 섬유상 해포석(sepiolite)과의 복합화를 통해 유연성을 지닌 세라믹 발포체의 제조가능성을 조사하였다. 무기광물 섬유 해포석의 해섬처리는 팽창진주암과 해포석으로 이루어진 세라믹발포체의 제조를 위해 가장 중요한 전 처리공정이다. 해섬된 해포석과 팽창진주암은 혼합 교반되어 슬러리 상태로 이루어지며, 이 슬러리상의 복합물은 $300^{\circ}C$ 이하의 저온 열처리과정을 통해 형상화 및 발포화되어 괴상의 발포체로 제조된다. 슬러리상 복합물의 열처리공정은 슬러리 복합물 중에 잔존하는 수분의 증발단계, 일정발포온도에서 발포화제가 분해되어 진행되는 발포화단계 및 발포 후 잔류되는 유기물질의 분해제거단계를 포함하는 것으로 설계되어야 한다. 열처리 공정조건과 발포제는 상관성이 있으며 팽창진주암과 해포석섬유로 이루어진 슬러리상 혼합물의 발포에 적절한 발포제는 유기계 발포제가 적절하며 DSS (dioctyl sodium sulfosuccinte)가 효과적이었다.

• 한국표면공학회지
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• 제47권2호
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• pp.68-74
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• 2014

The seed step-coverage enhancement process (SSEP) using Pd/Cu/PVP colloids was investigated for the filling of through silicon via (TSV) without void. TEM analysis showed that the Pd/Cu nano-particles were well dispersed in aqueous solution with the average diameter of 6.18 nm. This Pd/Cu nano-particles were uniformly deposited on the substrate of Si/$SiO_2$/Ti wafer using electrophoresis with the high frequency Alternating Current (AC). After electroless Cu deposition on the substrate treated with Pd/Cu/PVP colloids, the adhesive property between deposited Cu layer and substrate was evaluated. The Cu deposit obtained by SSEP with Pd/Cu/PVP colloids showed superior adhesion property to that on Pd ion catalyst-treated substrate. Finally, by implementing the SSEP using Pd/Cu/PVP colloids, we achieved 700% improvement of step coverage of Cu seed layer compared to PVD process, resulting in void-free filling in high aspect ratio TSV.

• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2006년도 춘계학술대회논문집
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• pp.340-343
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• 2006

As the needs of consumer on ride comforts increase and the reduction of road traffic noise tightened step by step, the power unit noise emitted by cars has been reduced. It has been found that tire noise dominates noise produced by the power-train when vehicles are driven at high speeds. Therefore, in these days, tire/pavement noise is concerned. Tire/pavement noise is affected by pavement type and vehicle???s transmission loss. Tire noise mechanism is produced by several mechanisms. The sound of tire can propagate either through the air or through the structure of vehicle. Pattern noise is the result of pressure variations through the air to the interior side of vehicle. Especially, on smooth asphalt the periodicity of tread design, pitch sequence is important factor, which have an influence on the reduction of tire noise.