• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.351.1-351.1
• /
• 2014

In this study, we prepared the solution-based In-Ga-Zn oxide thin film transistors (IGZO TFTs) of multistacked active layer and characterized the gate bias instability by measuring the change in threshold voltage caused by stacking. The solutions for IGZO active layer were prepared by In:Zn=1:1 mole ratio and the ratio of Ga was changed from 20% to 30%. The TFTs with multistacked active layer was fabricated by stacking single, double and triple layers from the prepared solutions. As the number of active layer increases, the saturation mobility shows the value of 1.2, 0.8 and 0.6 (). The electrical properties have the tendency such as decreasing. However when gate bias VG=10 V is forced to gate electrode for 3000 s, the threshold voltage shift was decreased from 4.74 V to 1.27 V. Because the interface is formed between the each layers and this affected the current path to reduce the electrical performances. But the uniformity of active layer was improved by stacking active layer with filling the hole formed during pre-baking so the stability of device was improved. These results suggest that the deposition of multistacked active layer improve the stability of the device.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2009.10a
• /
• pp.953-956
• /
• 2009

We have investigated the effect of light on amorphous silicon thin film transistors based photo-sensor applications. We have analyzed the instability caused by electrical gate bias stresses under the light illumination and the effect of photo-induced quasi-annealing on the instability. Threshold voltage ($V_{TH}$) under the negative gate bias stress with light illumination was more decreased than that under the negative gate bias stress without light illumination even though $V_{TH}$ caused by the light-induced stress without negative gate bias was shifted positively. These results are because the increase of carrier density in a channel region caused by the light illumination has the enhanced effect on the instability caused by negative gate bias stress. The prolonged light illumination led to the recovery of shifted VTH caused by negative gate bias stress under the light illumination due to the recombination of trapped hole charges.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1988.10a
• /
• pp.95-97
• /
• 1988

The instability of MOS devices is mainly caused by the oxide charges, and as the need to develop the gate metal grows researches for various new metal gate have been performed, and in these researches, the difference work function existing between the metal and the semiconductor should be considered. Here int his paper, the device is made by the sputtering and the LPCVD method using pure Al, compound metal. poly-si, as a gate metal, the result of the research was shown that the work function difference from using different gate metals effects on the flatband voltage shift. This means we can infer that the threshold voltage adjustment is possible by using different gate metals and this whole mechanism makes the devices behavior more stable.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.21 no.9
• /
• pp.1627-1634
• /
• 2017

In this work, a junctionless transistor with different film thickness of amorphous InGaZnO has been fabricated and it's instability has been analyzed with different film thickness under positive and negative gate stress as well as light illumination. It was found that the threshold voltage shift and the variation of drain current have been increased with decrease of film thickness under the condition of gate stress and light illumination. The reasons for the observed results have been explained by stretched-exponential model and device simulation. Due to the reduced carrier trapping time with decrease of film thickness, electrons and holes can be activated easily. Due to the increase of vertical channel electric field reaching the back interface with decrease of film thickness, more electrons and holes can be accumulated in back interface. When one decides the film thickness for the fabrication of junctionless transistor, the more significant device instability with decrease of film thickness should be consdered.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2008.10a
• /
• pp.1297-1300
• /
• 2008

Electrical stress degradation of low temperature, amorphous silicon thin film transistors is reviewed, and the implications for various types of flexible circuitry including active matrix backplanes, integrated drivers and general purpose digital circuitry are examined. A circuit modeling tool that enables the prediction of complex circuit degradation is presented.

• Proceedings of the KIEE Conference
• /
• 2006.10a
• /
• pp.22-23
• /
• 2006

A new current-driving pixel circuit for active-matrix organic light-emitting diodes (AMOLEDs), composed of four organic thin-film transistors (OTFTs) and one capacitor, is proposed using a current scaling method. Designing pixel circuits with OTFTs has many problems due to the instability of the OTFT parameters with still unknown characteristics of the material. Despite the problems in using OTFTs to drive the pixel circuit, our work could be set as a goal for future OTFT development. The simulation results show enhanced linearity between input data and OLEO luminescence at low current levels as well as successfully compensating the variation of the OTFTs, such as the threshold voltage and mobility.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.5
• /
• pp.526-532
• /
• 2015

We quantitatively investigated instability mechanisms under simultaneous positive gate and drain bias stress (SPGDBS) in self-aligned top-gate amorphous indium-zinc-oxide thin-film transistors. After SPGDBS ($V_{GS}=13V$and $V_{DS}=13V$), the parallel shift of the transfer curve into a negative $V_{GS}$ direction and the increase of on current were observed. In order to quantitatively analyze mechanisms of the SPGDBS-induced negative shift of threshold voltage (${\Delta}V_T$), we experimentally extracted the density-of-state, and then analyzed by comparing and combining measurement data and TCAD simulation. As results, 19% and 81% of ${\Delta}V_T$ were taken to the donor-state creation and the hole trapping, respectively. This donor-state seems to be doubly ionized oxygen vacancy ($V{_O}^{2+}$). In addition, it was also confirmed that the wider channel width corresponds with more negative ${\Delta}V_T$. It means that both the donor-state creation and hole trapping can be enhanced due to the increase in self-heating as the width becomes wider. Lastly, all analyzed results were verified by reproducing transfer curves through TCAD simulation.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2016.02a
• /
• pp.289.2-289.2
• /
• 2016

In-Ga-Zn-O(IGZO) receive great attention as a channel material for thin film transistors(TFTs) as next-generation display panel backplanes due to its superior electrical and physical properties such as a high mobility, low off-current, high sub-threshold slope, flexibility, and optical transparency. For the purpose of fabricating high performance IGZO TFTs, a thermal recovery process above a temperature of $300^{\circ}C$ is required for recovery or rearrangement of the ionic bonding structure. However diffused metal atoms from source/drain(S/D) electrodes increase the channel conductivity through the oxidation of diffused atoms and reduction of $In_2O_3$ during the thermal recovery process. Threshold voltage ($V_{TH}$) shift, one of the electrical instability, restricts actual applications of IGZO TFTs. Therefore, additional investigation of the electrical stability of IGZO TFTs is required. In this paper, we demonstrate the effect of Ti diffusion and modulation of interface traps by carrying out an annealing process on IGZO. In order to investigate the effect of diffused Ti atoms from the S/D electrode, we use secondary ion mass spectroscopy (SIMS), X-ray photoelectron spectroscopy, HSC chemistry simulation, and electrical measurements. By thermal annealing process, we demonstrate VTH shift as a function of the channel length and the gate stress. Furthermore, we enhance the electrical stability of the IGZO TFTs through a second thermal annealing process performed at temperature $50^{\circ}C$ lower than the first annealing step to diffuse Ti atoms in the lateral direction with minimal effects on the channel conductivity.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.14 no.5
• /
• pp.682-687
• /
• 2014

We have performed reverse gate bias stress tests on AlGaN/GaN-on-Si Heterostructure FETs (HFETs). The shift of threshold voltage ($V_{th}$) and the reduction of on-current were observed from the stressed devices. These changes of the device parameters were not permanent. We investigated the temporary behavior of the stressed devices by analyzing the temperature dependence of the instabilities and TCAD simulation. As the baseline temperature of the electrical stress tests increased, the changes of the $V_{th}$ and the on-current were decreased. The on-current reduction was caused by the positive shift of the $V_{th}$ and the increased resistance of the gate-to-source and the gate-to-drain access region. Our experimental results suggest that electron-trapping effect into the shallow traps in devices is the main cause of observed instabilities.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2004.08a
• /
• pp.471-474
• /
• 2004

We investigated field emission (FE) characteristics of multi-walled carbon nanotubes (CNTs) grown on all over patterned cathode electrode lines (CL pattern) and grown on along the central areas of the cathode lines(CL pattern). The CNTs grown on the SL pattern showed a lower threshold voltage and higher emission current than those on the CL pattern, due to the concentration of electric fields at the edges of the cathode lines. For the SL-patterned CNTs, however, the FE gradually spread out to the neighbors with time, and was instantly extinguished in some area and then slowly resumed again. Such areal- spread FE did not occur for the CL-patterned sample, leading to the stable FE together with the instant turn-on capability. It is suggested that the spread FE and instability for the SL-patterned CNTs may be related to the electrical charging on the insulator surface around the cathode line edges.