• Journal of Electrical Engineering and Technology
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• v.10 no.3
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• pp.1066-1074
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• 2015

This paper presents the reverse recovery characteristic according to the change of switching states when Si diode and SiC diode are used as clamp diode and proposes a method to minimize the switching loss containing the reverse recovery loss in the neutral-point-clamped inverter at low modulation index. The previous papers introduce many multiple circuits replacing Si diode with SiC diode to reduce the switching loss. In the neutral-point-clamped inverter, the switching loss can be also reduced by replacing device in the clamp diode. However, the switching loss in IGBT is large and the reduced switching loss cannot be still neglected. It is expected that the reverse recovery effect can be infrequent and the switching loss can be considerably reduced by the proposed method. Therefore, it is also possible to operate the inverter at the higher frequency with the better system efficiency and reduce the volume, weight and cost of filters and heatsink. The effectiveness of the proposed method is verified by numerical analysis and experiment results.

• Journal of Power Electronics
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• v.17 no.2
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• pp.368-379
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• 2017

In this paper, a direct torque control algorithm with novel duty cycle-based modulation is proposed for permanent magnet synchronous motor drives fed by neutral-point clamped three-level inverters. Compared with the standard DTC, the proposed algorithm can suppress steady-state torque ripples as well as ensure neutral-point potential balance and smooth vector switching. A unified torque/flux evaluation table with multiple voltage vectors and precise control levels is established and used in this method. This table can be used to evaluate the effects of duty-cycle vectors on torque and flux directly, and the elements of the table are independent of the motor parameters. Consequently, a high number of appropriate voltage vectors and their corresponding duty cycles can be selected as candidate vectors to reduce torque ripples by looking up the table. Furthermore, small vectors are incorporated into the table to ensure the neutral-point potential balance with the numerous candidate vectors. The feasibility and effectiveness of the proposed algorithm are verified by both simulations and experiments.

• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.489-490
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• 2016

본 논문에서는 인버터 시스템의 가격을 줄이기 위해 3-레벨 NPC 인버터의 중성단에 하나의 션트 저항을 삽입함으로써 AC 전동기의 3상 전류를 획득하는 방법을 제안한다. 션트 저항으로부터 정확한 상 전류를 획득하기 위해서는 최소한의 시간이 필요하며 때문에 측정불가영역이 존재하게 된다. 기존의 측정불가영역으로 부터 상 전류를 복원하는 방법은 스위칭 패턴을 이동시키거나 공간 벡터 전압 변조 기법(SVPWM) 이외의 변조 기법을 이용하였는데 이러한 방법은 전류에 고조파를 증가시켜 효율을 떨어뜨리고 소음을 발생시킨다. 본 논문에서는 동기 좌표계 d-q축 비례적분제어기와 전동기 시스템의 전달함수를 이용하여 지령 전류로부터 실제 전류와 같은 전류를 얻는 방법을 통해 기존의 문제점들을 개선하는 방법을 제안한다. 제안된 방법은 시뮬레이션을 통해 증명하였다.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.315-316
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• 2015

본 논문에서는 3-레벨 Neutral-Point-Clamped (NPC) 인버터의 DC-Link 중성점 전압 리플을 저감하여 인버터 출력 전압의 품질 신뢰성 향상이 가능한 새로운 Discontinuous Pulse Width Modulation (DPWM) 기법을 제안한다. NPC 인버터에서는 두 개의 커패시터로 이루어진 DC-Link 구조로 인해 상, 하단 DC-Link 커패시터 전압 불평형인 상황에서 DC-Link 중 성점 전압 리플이 발생한다. 중성점 전압 리플 발생 시 출력 전압의 품질을 보장할 수 없으며, 민감한 부하에 손상을 입힐 수 있다. 제안한 DPWM 알고리즘은 DC-Link 커패시터 전압을 조정하는 두 개의 오프셋을 사용하여 중성점 전압 리플을 저감한다. 또한, 시뮬레이션을 통해 본 논문에서 제안한 알고리즘의 타당성을 검증한다.

• Journal of Power Electronics
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• v.19 no.4
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• pp.907-921
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• 2019

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1306-1315
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• 2016

Modern power systems driven by high-power converters have become inevitable in view of the ever increasing demand for electric power. The total power loss can be reduced by limiting the switching losses in such power converters; increased power efficiency can thus be achieved. A reduced switching frequency that is less than a few hundreds of hertz is applied to power converters that produce output waveforms with high distortion. Selective harmonic elimination pulse width modulation (SHEPWM) is an optimized low switching frequency pulse width modulation method that is based on offline estimation. This method can pre-program the harmonic profile of the output waveform over a range of modulation indices to eliminate low-order harmonics. In this paper, a SHEPWM scheme for three-phase three-leg neutral point clamped inverter is proposed. Aside from eliminating the selected harmonics, the DC capacitor voltages at the DC bus are also balanced because of the symmetrical pulse pattern over a quarter cycle of the period. The technique utilized in the estimation of switching angles involves the firefly algorithm (FA). Compared with other techniques, FA is more robust and entails less computation time. Simulation in the MATLAB/SIMULINK environment and experimental verification in the very large scale integration platform with Spartan 6A DSP are performed to prove the validity of the proposed technique.

• Journal of Power Electronics
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• v.14 no.1
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• pp.175-182
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• 2014

Tracking harmonic current quickly and precisely is one of the keys to designing active power filters (APF). In the past, the current state feedback decoupling PI control was an effective means for three-phase systems in the current control of constant voltage constant frequency inverters and high frequency PWM reversible rectifiers. This paper analyzes in detail the limitation of the conventional PI conditioner in the APF application field and presents a novel PI control method. Canceling the delay of one sampling period and the misadjustment for tracking the harmonic current is the key problem of this PI control. In this PI control, the predictive output current value is obtained by a state observer. The delay of one sampling period is remedied in this digital control system by the state observer. The predictive harmonic command current value is obtained by a repetitive predictor synchronously. The repetitive predictor can achieve better predictions of the harmonic current. By this means, the misadjustment of the conventional PI control for tracking the harmonic current is cancelled. The experiment results with a three-level NPC APF indicate that the steady-state accuracy and dynamic response of this method are satisfying when the proposed control scheme is implemented.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1964-1980
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• 2016

This paper presents a new simplified harmonics extraction algorithm based on the synchronous reference frame (SRF) for an indirect current controlled (ICC) three-level neutral point diode clamped (NPC) inverter-based shunt active power filter (SAPF). The shunt APF is widely accepted as one of the most effective current harmonics mitigation tools due to its superior adaptability in dynamic state conditions. In its controller, the SRF algorithm which is derived based on the direct-quadrature (DQ) theory has played a significant role as a harmonics extraction algorithm due to its simple implementation features. However, it suffers from significant delays due to its dependency on a numerical filter and unnecessary computation workloads. Moreover, the algorithm is mostly implemented for the direct current controlled (DCC) based SAPF which operates based on a non-sinusoidal reference current. This degrades the mitigation performances since the DCC based operation does not possess exact information on the actual source current which suffers from switching ripples problems. Therefore, three major improvements are introduced which include the development of a mathematical based fundamental component identifier to replace the numerical filter, the removal of redundant features, and the generation of a sinusoidal reference current. The proposed algorithm is developed and evaluated in MATLAB / Simulink. A laboratory prototype utilizing a TMS320F28335 digital signal processor (DSP) is also implemented to validate effectiveness of the proposed algorithm. Both simulation and experimental results are presented. They show significant improvements in terms of total harmonic distortion (THD) and dynamic response when compared to a conventional SRF algorithm.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.354-355
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• 2011

그 동안 스위칭 손실 저감을 위해 Si 다이오드를 SiC 다이오드로 대체한 인버터들이 많이 소개되었다. NPC 인버터에서도 마찬가지로 클램프 다이오드 소자를 SiC 다이오드로 대체함으로써 스위칭 손실을 저감시킬 수 있다. 하지만 IGBT의 스위칭 손실이 매우 크기 때문에 단지 클램프 다이오드 소자를 바꿈으로써 줄일 수 있는 스위칭 손실은 한계가 있다. 따라서 본 논문은 낮은 변조지수를 갖는 NPC 인버터에서 역회복 손실을 포함한 스위칭 손실을 최소화 시킬 수 있는 새로운 PWM 방법을 제시한다. 제안한 방법에 의해 역회복 현상은 거의 발생하지 않으며 스위칭 손실은 상당히 저감된다. 그러므로 전체 시스템 효율을 증가시킬 수 있고 인버터를 더 높은 스위칭 주파수에서 동작시킬 수 있다. 제안한 방법의 타당성은 각 소자의 성능평가와 수치해석적 방법을 적용해 검증하였다.

• Proceedings of the KIPE Conference
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• 2014.07a
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• pp.221-222
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• 2014

본 논문에서는 3레벨 NPC 인버터의 전원전압변조 방식을 이용하여 넓은 변조 지수에서 제어 가능한 간단한 중성점 제어 방법을 제안하였다. 제안한 제어 방법은 전원 전압 변조방법을 이용한 중성점 균형 계수와 정확한 옵셋 전압의 제한치를 이용하여 계산된다. 중성점 균형 계수는 전류의 극성과 상하 커패시터의 전압에 의해서 정의되어 진다. 제안된 제어 방법은 중성점 제어를 위해 공간전압 PWM과 불연속 PWM까지 동작범위를 확장하여 동작되어 진다. 제안된 방법은 넓은 변조지수에서 전원전압변조를 이용하여 공간전압 PWM방법을 쉽게 구현할 수 있다. 제안된 중성점 제어 방법의 타당성은 시뮬레이션을 통하여 검증하였다.