• Title/Summary/Keyword: Thin-film Dielectric

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Thermal Design of High Power Semiconductor Using Insulated Metal Substrate (Insulated Metal Substrate를 사용한 고출력 전력 반도체 방열설계)

  • Bongmin Jeong;Aesun Oh;Sunae Kim;Gawon Lee;Hyuncheol Bae
    • Journal of the Microelectronics and Packaging Society
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    • v.30 no.1
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    • pp.63-70
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    • 2023
  • Today, the importance of power semiconductors continues to increase due to serious environmental pollution and the importance of energy. Particularly, SiC-MOSFET, which is one of the wide bandgap (WBG) devices, has excellent high voltage characteristics and is very important. However, since the electrical properties of SiC-MOSFET are heatsensitive, thermal management through a package is necessary. In this paper, we propose an insulated metal substrate (IMS) method rather than a direct bonded copper (DBC) substrate method used in conventional power semiconductors. IMS is easier to process than DBC and has a high coefficient of thermal expansion (CTE), which is excellent in terms of cost and reliability. Although the thermal conductivity of the dielectric film, which is an insulating layer of IMS, is low, the low thermal conductivity can be sufficiently overcome by allowing a process to be very thin. Electric-thermal co-simulation was carried out in this study to confirm this, and DBC substrate and IMS were manufactured and experimented for verification.

Preparation and Electrical Properties of $(Ba_{0.5}, Sr_{0.5})Tio_3$Thin Films by RF Magnetron Sputtering (RF Magnetron Sputtering에 의한 $(Ba_{0.5}, Sr_{0.5})Tio_3$박막의 제조와 전기적 특성에 관한 연구)

  • Park, Sang-Sik;Yun, Son-Gil
    • Korean Journal of Materials Research
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    • v.4 no.4
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    • pp.453-458
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    • 1994
  • $(Ba_{0.5}Sr_{0.5)/TiO_3$(BST) thin films were prepared for the application of 256 Mb DRAM by RF magnetron sputtering. The crystallinity of BST thin films increased with increasing deposition tempera lure. The composition of thin films was $(Ba_{0.48}Sr_{0.48)/TiO_{2.93}$ Pt/Ti barrier layer suppressed the diffusion of Si into BST layer. The films showed a dielectric constant of 320 and a dissipation factor of 0.022 at 100 kHz. the change of capacitance of the films with applied voltage was small, showing paraelectric property. The charge storage density and leakage current density were 40fC/$\mu \textrm{m}^{2}$ and 0.8$\mu A/\textrm{cm}^2$, respectively at a field of 0.15 MV/cm. The BST films obtained by RF magnetron sputtering appeared to be potential thin film capacitors for 256 Mb DRAM application.

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Low-temperature crystallized BST thin films by excimer laser annealing for embedded RF tunable capacitor

  • Kang, Min-Gyu;Do, Young-Ho;Oh, Seung-Min;Kang, Chong-Yun;Kim, Sang-Sig;Yoon, Seok-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.28-28
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    • 2010
  • This study realized low-temperature crystallization process of the $Ba_{0.6}Sr_{0.4}TiO_3$ (BST) thin films without thermal damage of substrate using excimer laser annealing (ELA) and structural and electrical characteristics were investigated. The amorphous BST thin films were prepared on Pt/Ti/$SiO_2$/Si substrate by sol-gel method at $250^{\circ}C$. The ELA was carried out using KrF excimer laser which provided excitation wavelength of 248 nm. The beam homogenizing system was used in order to homogenize beam shape of Gaussian fit. The XRD and SEM were used to analyze structural characteristics and the microwave capacitance, dielectric loss and tunability of the BST films were measured by a symmetrical stripline resonator method with shorted end. Consequently, the crystallinity of BST thin films were improved after ELA process and RF tunable capacitor was demonstrated at low temperature below $300^{\circ}C$.

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Reduce of Etching Damage of PZT Thiin Films in $Cl_{2}/CF_{4}$ Plasma with addition of Ar and $O_2$ ($Cl_{2}/CF_{4}$ 플라즈마에 Ar,$O_2$첨가에 따른 PZT 박막의 식각 손상 효과)

  • 강명구;김경태;김창일
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.21-25
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    • 2001
  • In this study, recovery of plasma etching damage in PZT thin film with additive gas and re-annealing after etching have been investigated. The PZT thin films were etched as a function of Cl$_2$/CF$_4$ with addition of Ar and $O_2$ with inductively induced plasma. The etch rates of PZT thin films were 1450$\AA$/min at 30% additive Ar into (Cl$_2$(80%)+CF$_4$ (20%)) and 1100$\AA$/min at 10% additive $O_2$ into C(Cl$_2$(80%)+CF$_4$ (20%)). In order to recovery properties of PZT thin films after etching, the etched PZT thin films were re-annealed at various temperatures in at $O_2$ atmosphere. From the hysteresis curves, ferroelectrical properties are improved by $O_2$ re-annealing process. The improvement of ferroelectric behavior at annealed sample is consistent with the increase of the (100) and (200) PZT peaks revealed by x-ray diffraction (XRD). From x-ray photoelectron spectroscopy (XPS) analysis, intensity of Pb-O, Zr-O and Ti-O peak are increased and the chemical residue peak is reduced by $O_2$ re-annealing. The ferroelectric behavior consistent with the dielectric nature of Ti$_{x}$O$_{y}$ is recovered by $O_2$ recombination during rapid thermal annealing process.s.s.

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Analysis of Process Parameters on Cell Capacitances of Memory Devices (메모리 소자의 셀 커패시턴스에 미치는 공정 파라미터 해석)

  • Chung, Yeun-Gun;Kang, Seong-Jun;Joung, Yang-Hee
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.5
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    • pp.791-796
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    • 2017
  • In this study, we investigated the influence of the fabrication process of stacked capacitors on the cell capacitance by using Load Lock (L/L) LPCVD system for dielectric thin film of DRAM capacitor. As a result, it was confirmed that the capacitance difference of about 3-4 fF is obtained by reducing the effective thickness of the oxide film by about $6{\AA}$ compared to the conventional non-L/L device. In addition, Cs was found to be about 3-6 fF lower than the calculated value, even though the measurement range of the thickness of the nitride film as an insulating film was in a normal management range. This is because the node poly FI CD is managed at the upper limit of the spec, resulting in a decrease in cell surface area, which indicates a Cs reduction of about 2fF. Therefore, it is necessary to control the thickness of insulating film and CD management within 10% of the spec center value in order to secure stable Cs.

Fatigue Characteristics of PLZT(x/30/70) Thin Films with Various La Concentrations (La 농도에 따른 PLZT(x/30/70) 박막의 피로 특성에 관한 연구)

  • Kang, Seong-Jun;Chung, Yeun-Gun;Joung, Yang-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.5
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    • pp.1066-1072
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    • 2005
  • The effects of La concentration in PLZT (z/30/70) thin film prepared by sol-gel method are investigated for the NVFRAM application. As the La concentration increases, the dielectric constants at 10 kHz increase from 450 to 600, while the loss tangent and the leakage current density at 100 kV/cm decrease from 0.075 to 0.025 and from $5.83{\times}10^{-7}\;to\;1.38{\times}10^{-7}\;A/cm^2,$ respectively. In the results of hysteresis loops measured at 175 kV/cm, the remanent polarization and the coercive field decrease from 20.8 to $10.5{\mu}C/cm^2$ and from 54.48 to 32.12 kV/cm, respectively, with the increase of La concentration from 0 to $10mol\%.$ After applying for $10^9$ cycles of square pulses with ${\pm}5V$ height, the remanent polarization of the PLZT (10/30/70) thin film decreases $40\%$ from the initial state, while that of the PLZT (10/30/70) thin film decreases $64\%.$.

Electrical Characteristics of $(Ba,Sr)TiO_3/RuO_2$ Thin films

  • Park Chi-Sun
    • Journal of the Microelectronics and Packaging Society
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    • v.11 no.3 s.32
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    • pp.63-70
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    • 2004
  • The structural, electrical properties of $(Ba, Sr)TiO_3[BSTO]/RuO_2$ thin films were examined by the addition of amorphous BSTO layer between crystlline BSTO film and $RuO_2$ substrate. We prepared BSTO films with double-layered structure, that is, amorphous layers deposited at $60^{\circ}C$ and crystalline films. Crystalline films were prepared at 550 on amorphous BSTO layer. The thickness of the amorphous layers was varied from 0 to 170 nm. During the deposition of crystalline films, the crystallization of the amorphous layers occurred and the structure was changed to circular while crystalline BSTO films showed columnar structure. Due to insufficient annealing effect, amorphous BSTO phase was observed when the thickness of the amorphous layers exceeded 30 nm. Amorphous BSTO layer could also prevent the formation of oxygen deficient region in $RuO_2$ surface. Leakage current of total BSTO films decreased with increasing amorphous layer thickness due to structural modifications. Dielectric constant showed maxi-mum value of 343 when amorphous layer thickness was 30 nm at which the improvement by grain growth and the degradation by amorphous phase were balanced.

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Characterization of Fracture Toughness and Wear Behavior for Plasma Ceramic Coated Materials (플라즈마 코팅재료의 파괴인성과 마모 거동)

  • Ha, Sun-Ho;Lee, Dong-Woo;Rehman, Atta Ur;Wasy, Abdul;Song, Jung-Il
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.12 no.4
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    • pp.123-130
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    • 2013
  • Zirconia is well known in industrial applications for its mechanical characteristics. DLC (diamond-like carbon) have high elastic modulus, high electric resistivity, high dielectric constant, high wear resistance, low friction coefficient, bio compatibility, chemically inert and thermally stable. Because of all these physical and chemical properties these types of coatings have become key procedure for thin coating. Friction coefficient of DLC films is already evaluated and the current work is a further advancement by calculating the fracture toughness and wear resistance of these coatings. In the present study DLC thin film coatings are developed on $ZrO_2$ alloy surface using Plasma Enhanced Chemical Vapor Deposition (PECVD) method. Vicker hardness test is employed and it was concluded that, DLC coatings increase the Vickers hardness of ceramics.

Formation of $PbTiO_3$ Thin Films by Thermal Diffusion from Multilayrs (다층 구조로부터 열 확산에 의한 $PbTiO_3$ 박막의 제조)

  • 서도원;최덕균
    • Journal of the Korean Ceramic Society
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    • v.30 no.6
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    • pp.510-516
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    • 1993
  • $PbTiO_3$ thin films have been formed by rapid thermal annealing(RTA) of $TiO_2$/Pb/$TiO_2$ multilayer films deposited on Si wafers by RF sputtering. Based on the optimal depositon conditions of TiO2 and Pb, $TiO_2$/Pb/$TiO_2$ three layers were deposited for 900$\AA$ each. These films were subjected to RTA process at the temperatures ranging from $400^{\circ}C$ to $900^{\circ}C$ for 30 seconds in air, and were analyzed by X-ray diffraction and transmission electron microscopy to investigate the phases and the microstructures. As a result, perovskite $PbTiO_3$ phases was obtained above $500^{\circ}C$ with the trace of unreacted $TiO_2$. RBS analysis revealed the anisotropic behavior of diffusion that the diffusivity of Pb to the bottom $TiO_2$ layer was faster than that of Pb to the top $TiO_2$ layer. The amorphous Pb-silicate was formed between film and Si substrate due to the diffusion of Pb, but Pb-silicate existed locally at the interface and the amount of that phase was very small. Therefore the effect of bottom $TiO_2$ layer as a diffusion barrier was confirmed. $PbTiO_3$ films formed by current technique showed a relative dielectric constant of 60, and the maximum breakdown field reached 170kV/cm.

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Effects of Stress Mismatch on the Electrical Characteristics of Amorphous Silicon TFTs for Active-Matrix LCDs

  • Lee, Yeong-Shyang;Chang, Jun-Kai;Lin, Chiung-Wei;Shih, Ching-Chieh;Tsai, Chien-Chien;Fang, Kuo-Lung;Lin, Hun-Tu;Gan, Feng-Yuan
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.729-732
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    • 2006
  • The effect of stress match between silicon nitride ($SiN_2$) and hydrogenated amorphous silicon (a-Si:H) layers on the electrical characteristics of thin-film transistors (TFTs) has been investigated. The result shows that modifying the deposition conditions of a Si:H and $SiN_2$ thin films can reduce the stress mismatch at a-Si:H/SiNx interface. Moreover, for best a-Si:H TFT characteristics, the internal stress of gate $SiN_2$ layer with slightly nitrogen-rich should be matched with that of a-Si:H channel layer. The ON current, field-effect mobility, and stability of TFTs can be enhanced by controlling the stress match between a-Si:H and gate insulator. The improvement of these characteristics appears to be due to both the decrease of the interface state density between the a-Si:H and SiNx layer, and the good dielectric quality of the bottom nitride layer.

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