• 제목/요약/키워드: Thin plastic substrate

검색결과 110건 처리시간 0.034초

유한요소해석에 의한 코팅면의 브리넬 경도 평가: 제1보 - 타당성 연구 (Evaluation of Brinell Hardness of Coated Surface Using Finite Element Analysis: Part 1 - A Feasibility Study)

  • 박태조;강정국
    • Tribology and Lubricants
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    • 제36권6호
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    • pp.378-384
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    • 2020
  • The friction surfaces of mechanical parts are heat-treated or coated with hard materials to minimize wear. Increasing the hardness is a very useful way to reduce abrasive wear. The general Brinell hardness test, which is widely used for metallic materials, is not suitable because it hardly shows any change in hardness when coated with thin films. In this study, we propose a basis for the application of the new Brinell hardness test method to the coated friction surface. An indentation analysis of the rigid sphere and elastic-perfectly plastic materials is performed using a commercial finite element analysis software. The results indicate that their loadto-diameter ratio is the same; the Brinell hardness test method can be applied even when the indenter diameter is on the micrometer scale. In the case of hard coating, it is difficult to calculate Brinell hardness using the diameter of the indentation, but the study revealed, for the first time, that it can be calculated using the depth of the indentation regardless of coating. The change in hardness owing to thin film coating over a wide load range implies that the hardness evaluation method is appropriate. Additional studies on various properties related to the substrate and coating material are required to apply the proposed method.

정공주입물질 두께 변화에 따른 유기발광다이오드의 효율 개선 (An Efficiency Improvement of the OLEDs due to the Thickness Variation on Hole-Injection Materials)

  • 신종열;곽의위;김태완;홍진웅
    • 한국전기전자재료학회논문지
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    • 제28권5호
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    • pp.344-349
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    • 2015
  • A new information society of late has arrived by the rapid development of various information & communications technologies. Accordingly, mobile devices which are light and thin, easy and convenient to carry on the market. Also, the requirements for the larger television sets such as fast response speed, low-cost electric power, wider visual angle display are sufficiently satisfied. The currently most widely studied display material, the Organic Light-emitting Diodes(OLEDs) overwhelms the Liquid Crystal Display(LCD), the main occupier of the market. This new material features a response speed of more than a thousand times faster, no need of backlight, a low driving voltage, and no limit of view angle. And the OLEDs has high luminance efficiency and excellent durability and environment resistance, quite different from the inorganic LED light source. The OLEDs with simple device structure and easy produce can be manufactured in various shapes such as a point light source, a linear light source, a surface light source. This will surely dominate the market for the next generation lighting and display device. The new display utilizes not the glass substrate but the plastic one, resulting in the thin and flexible substrate that can be curved and flattened out as needed. In this paper, OLEDs device was produced by changing thickness of Teflon-AF of hole injection material layer. And as for the electrical properties, the four layer device of ITO/TPD/$Alq_3$/BCP/LiF/Al and the five layer device of ITO/Teflon AF/TPD/$Alq_3$/BCP/Lif/Al were studied experimentally.

유연한 기판상의 유기 트랜지스터의 절연 표면층 상태 변화에 의한 전기적 특성 향상 (Changes of dielectric surface state In organic TFTs on flexible substrate)

  • 김종무;이주원;김영민;박정수;김재경;장진;오명환;주병권
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 춘계학술대회 논문집 디스플레이 광소자분야
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    • pp.86-89
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    • 2004
  • Organic thin film transistors (OTFTs) are fabricated on the plastic substrate through 4-level mask process without photolithographic patterning to yield the simple fabrication process. And we herewith report for the effect of dielectric surface modification on the electrical characteristics of OTFTs. The KIST-JM-1 as an organic molecule for the surface modification is deposited onto the surface of zirconium oxide $(ZrO_2)$ gate dielectric layer. In this work, we have examined the dependence of electrical performance on the interface surface state of gate dielectric/pentacene, which may be modified by chemical properties in the gate dielectric surface.

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ITO층의 두께에 따른 ITO/PET sheet의 변형거동 및 균열 형성 거동 (Influence of ITO Thickness on the Deformation and Cracking Behaviors of ITO/PET Sheets)

  • 김진열;홍순익
    • 한국재료학회지
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    • 제19권1호
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    • pp.1-6
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    • 2009
  • In this study, the stress-strain response and the cracking behaviors of ITO film on a PET substrate are investigated. The cracking behaviors of ITO thin films deposited on a thermoplastic semi-crystalline polymer developed for flexible display applications was investigated by means of tensile experiments equipped with an electrical measurement apparatus and an in-situ optical microscope. Electrical resistance increased gradually in the elastic-to-plastic transition region of the stress strain curves and cracks formed. Numerous cracks were found in this region, and the increase of the resistance was linked to the cracking of ITO thin films. Upon loading, the initial cracks perpendicular to the tensile axis were observed at about 1% of the total strain. They propagated to the entire sample width as the strain increased. The spacing between the horizontal cracks is thought to be determined by the fracture strength and the thickness of the ITO film as well as by the interfacial strength between the ITO and PET. The effect of the strain rate on the cracking behavior was also investigated. The crack density increased as the strain increased. The spacing between the horizontal cracks (perpendicular to the stress axis) increased as the strain rate decreased. The increase of the crack density as the strain rate decreased can be attributed to the higher fraction of the plastic strain to the total strain at a given total strain. The higher critical strain for the onset of the increase in the resistance and the crack initiation of the ITO/PET with a thinner ITO film (300 ohms/sq.) suggests a higher strength of the thinner ITO film.

Pentacene TFTs and Integrated Circuits with PVP as Gate Insulator

  • Xu, Yong-Xian;Byun, Hyun-Sook;Song, Chung-Kun
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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    • pp.1027-1029
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    • 2004
  • In this paper, we have fabricated pentacene thin film transistors (TFTs) using polyvinylphenol (PVP) copolymer and cross-linked PVP as gate insulator on glass and plastic (PET) substrate. Depending on the density of PVP and cross-link material the performance has been changed. We obtained the best device performance with the mobility of 0.32cm2/V${\cdot}$sec and the on/off current ratio of 1.19${\times}$106 for the case of 10wt% PVP copolymer mixed with 5wt% poly (melamine-co-formaldehyde). Additionally using pentacene TFTs with the above PVP gate insulator, we fabricated the integrated circuits including inverter which produced the gain of 9.7.

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Flexible Active-Matrix Electrophoretic Display With Integrated Scan-And Data-Drivers

  • Miyazaki, Atsushi;Kawai, Hideyuki;Miyasaka, Mitsutoshi;Inoue, Satoshi;Shimoda, Tatsuya
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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    • pp.153-156
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    • 2004
  • A newly developed flexible active-matrix (AM-) electrophoretic display (EPD) is reported. The AM-EPD features: (1) low-temperature polycrystalline silicon (LTPS) thin film transistor (TFT) technology, (2) fully integrated scan- and data-drivers, (3) flexibility and light-weight realized by transferring the whole circuits onto a plastic substrate using $SUFTLA^{TM}$ (Surface Free Technology by Laser Annealing/Ablation) process. A large storage capacitor is formed in each pixel so that driving electric field can be kept sufficiently strong during a writing period Two-phase driving scheme, a reset-phase which erases a previous image and a writing-phase for writing a new image, was chosen to cope with EPD's high driving voltage. The flexible AM-EPD has been successfully operated with a driving voltage of 8.5 V.

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다구찌 강건 설계를 통한 자장 여과 아크 소스로 증착된 사면체 비정질 탄소막의 최적화 (Optimization of tetrahedral amorphous carbon (ta-C) film deposited with filtered cathodic vacuum arc through Taguchi robust design)

  • 곽승윤;장영준;류호준;김지수;김종국
    • 한국표면공학회지
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    • 제54권2호
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    • pp.53-61
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    • 2021
  • The properties of tetrahedral amorphous Carbon (ta-C) film can be determined by multiple parameters and comprehensive effects of those parameters during a deposition process with filtered cathodic vacuum arc (FCVA). In this study, Taguchi method was adopted to design the optimized FCVA deposition process of ta-C for improving deposition efficiency and mechanical properties of the deposited ta-C thin film. The influence and contribution of variables, such as arc current, substrate bias voltage, frequency, and duty cycle, on the properties of ta-C were investigated in terms of deposition efficiency and mechanical properties. It was revealed that the deposition rate was linearly increased following the increasing arc current (around 10 nm/min @ 60 A and 17 nm/min @ 100A). The hardness and ID/IG showed a correlation with substrate bias voltage (over 30 GPa @ 50 V and under 30 GPa @ 250 V). The scratch tests were conducted to specify the effect of each parameter on the resistance to plastic deformation of films. The analysis on variances showed that the arc current and substrate bias voltage were the most effective controlling parameters influencing properties of ta-C films. The optimized parameters were extracted for the target applications in various industrial fields.

박형 기판의 사면 접합 공정 및 인장 특성 평가 (Scarf Welding of Thin Substrates and Evaluation of the Tensile Properties)

  • 강범석;나지후;고명준;손민정;고용호;이태익
    • 마이크로전자및패키징학회지
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    • 제30권3호
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    • pp.102-110
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    • 2023
  • 본 연구에서는 플렉서블 레이저 투과 용접 (flexible laser transmission welding, f-LTW)을 이용한 박형 기판의 사면 접합 (scarf welding) 공정을 개발하였다. 플렉서블 응용을 위해 경사면의 기울기에 따른 인장 강도의 거동을 조사하였다. 박형 기판으로써 100 ㎛ 이하 두께의 플라스틱 기판이 사용되었으며, 사면 접합을 위해서 기판의 말단에 경사면을 형성하는 지그 장치를 개발하였다. 플렉서블 고분자 기판에 대한 경사면 맞대기 접합을 개발함으로써 공정 후 접합부 두께가 증가하지 않는 유연 접합 기술 개발에 성공하였다. 단축 인장시험을 통해 접합부의 인장 강도를 평가하였으며, 그 결과 경사면의 기울기가 완만할수록 인장 강도가 증가함을 확인하였다. 경사각에 따른 접합 계면에서의 응력 분석을 수행하여 접합 구조 설계 인자를 규명하였다. 본 결과는 동일한 공정 조건에서 접합부의 형상에 따라서 인장 강도가 크게 달라질 수 있음을 시사하므로 접합 공정에서 접합부 형상을 고려하는 것에 대한 중요성을 확인할 수 있다.

Electrical Characteristic of IGZO Oxide TFTs with 3 Layer Gate Insulator

  • Lim, Sang Chul;Koo, Jae Bon;Park, Chan Woo;Jung, Soon-Won;Na, Bock Soon;Lee, Sang Seok;Cho, Kyoung Ik;Chu, Hye Yong
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.344-344
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    • 2014
  • Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.

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플라스틱기판 미세회로구조 제조를 위한 소프트 석판 기술의 적용 (Soft-lithography for Manufacturing Microfabricated-Circuit Structure on Plastic Substrate)

  • 박민정;주형규;박진원
    • Korean Chemical Engineering Research
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    • 제50권5호
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    • pp.929-932
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    • 2012
  • 화면표시장치 제조에 널리 이용되고 있는 미세구조 제조향 노광공정을 대신할 기반기술을 개발하고자 한다. 저가의 Polycarbonate 기판에 미세구조를 제조하기 위하여, Spin Coating으로 Polystyrene 박막을 형성하고 박막 위에 Polydimethylsiloxane 주형으로 소프트석판술을 적용하였다. 제조된 구조에 나노입자들을 배열하기 위해 계면작용을 이용하고자 하므로, 구조의 표면을 화학반응에 의해 소수성으로 개질하였다. 소수성으로의 개질은 Polystyrene 표면을 과망간칼륨으로 처리하고 Aminopropyltriethoxysilane을 반응시켜서 수행되었다. 개질된 특성은 X선광전자분광기로 분석되었다. 개질된 표면에서 친수성나노입자들이 분산되어 있는 수용액을 마이크로리터 단위의 방울로 떨어뜨리고, 수용액을 증발시킨다. 증발과정에서 계면상호작용과 미세구조의 물리적 유도로 특정 영역에 나노입자들이 배열되었다. 그리고, 이 배열의 전기적 응용을 확인하였다.