• 한국정밀공학회지
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• 제31권1호
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• pp.91-96
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• 2014

We present a droplet-manipulation method using opto-thermal flows in oils. The flows are originated from Marangoni and buoyancy effects due to temperature gradient, generated by the adsorption of light on an amorphous silicon thin film. Using this method, we can transport, merge and mix droplets in an extremely simple system. Since the temperature rise during the operation is small, this method can be used for biological applications without the damage on cell viability.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.505-508
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• 2006

Self-heating induced device degradation and its width/length (W/L) dimension dependence were studied in p-type polycrystalline silicon (poly-Si) thin film transistors (TFTs). Negative channel conductance was observed under high power region of output curve, which was mainly caused by hole trapping into gate oxide and also by trap state generation by self-heating effect. Self-heating effect became aggravated as W/L ratio was increased, which was understood by the differences in heat dissipation capability. By reducing applied power density normalized to TFT area, self-heating induced degradation could be reduced.

• 전자공학회논문지A
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• 제33A권5호
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• pp.117-124
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• 1996

The .mu.c-Si:H films have been deposited by PeCVD at the various conditions such as hydrogen dilution ratio, substrate temperature and RF power density. Then, we studied their electrical and optical properties. Top gate hydrogenated micro-crystalline silicon thin film transistors($\mu$c-Si:H TFTs) using $\mu$-Si:H and a-SiN:H films have been fabricated by FECVD. The electrical characteristics of the devices have been investigated by semiconductor parameter analyzer and compared with amorphous silicon thin film transistors (a-Si:H TFTs). In this study, on/off current ratio, threshold voltage and the field effect mobility of the $\mu$c-Si:H TFT were $3{\times}10^{4}$, 5.06V and 0.94cm$^{2}$Vs, respectively.

• ETRI Journal
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• 제24권5호
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• pp.398-400
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• 2002

Using $Cr_2O_3$ thin film, we developed a novel etch-stop technique for the protection of silicon surface morphology during deep ion coupled plasma etching of silica layers. With this technique we were able to etch a silica trench with a depth of over 20 ${\mu}m$ without any damage to the exposed silicon terrace surface. This technique should be well applicable to fabricating silica planar lightwave circuit platforms for opto-electronic hybrid integration.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1992년도 추계학술대회 논문집
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• pp.3-6
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• 1992

A new analytical expression for the saturated I-V characteristics of hydrogenerated amorphous silicon thin film transistors(a-si:H TFT) is presented and experimentally verified. The results show that the experimental transfer and output characteristics at several temperatures are easily modeled. The model is based on three functions obtained from the experimental data of $I_D$ versus $V_G$. Theoretical results confirm the simple form of the model in terms of the device geometry. It was determined that the saturated drain current increased at a fixed gate voltage and the device saturated at increasingly larger drain voltages while the threshold voltages decreased.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 심포지엄 논문집 정보 및 제어부문
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• pp.138-140
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• 2006

A new diagnosis model was constructed by combining atomic force microscopy (AFM), wavelet, and neural network. Plasma faults were characterized by filtering AFM-measured etch surface roughness with wavelet. The presented technique was evaluated with the data collected during the etching of silicon oxynitride thin film. A total of 17 etch experiments were conducted. Applying wavelet to AFM, surface roughness was detailed into vertical, horizon%at, and diagonal components. For each component, neural network recognition models were constructed and evaluated. Comparisons revealed that the vertical component-based model yielded about 30% improvement in the recognition accuracy over others. The presented technique was evaluated with the data collected during the etching of silicon oxynitride thin film. A total of 17 etch experiments were conducted

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1996년도 춘계학술대회 논문집
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• pp.220-223
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• 1996

Mechanical properties of Plasma-Enhanced Chemical Vapor Deposited (PECVD) silicon nitride thin film was studied to determine the feasibility of the film as a passivation layer over the aluminum bonding areas of integrated circuit chips. Ultimate strain of the films in thicknesses of about 5 k${\AA}$ was measured using four-point bending method. The ultimate strain of these films was constant at about 0.2% regardless of residual stress. Intrinsic and residual stresses of these films were measured and compared with thermal shock and cycling test results. Comparison of the results showed that more tensile films were more susceptible to crack- induced failure.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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• pp.15-16
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• 2000

The gate bias stress effect of the hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) with a $SiN_x/BCB$ gate insulator have been studied. The gate planarization was carried out by spin-coating of BCB (benzocyclobutene) on Cr gates. The BCB exhibits charge trappings during a high gate bias, but the stability of the TFT is the same as conventional one when it is between -25 V and +25 V. The charge trap density in the BCB increases with its thickness.

• 대한전기학회논문지
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• 제43권6호
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• pp.951-957
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• 1994

We present a new model for the series resistance of inverted-staggered amorphous silicon (a-Si) thin film transistors (TFT's) by employing the current spreading under the source and the drain contacts as well as the space charge limited current model. The calculated results based on our model have been in good agreements with the measured data over a wide range of applied voltage, gate-to-source and gate-to-drain overlap length, channel length, and operating temperature. Our model shows that the contribution of the series resistances to the current-voltage (I-V) characteristics of the a-Si TFT in the linear regime is more significant at low drain and high gate voltages, for short channel and small overlap length, and at low operating temperature, which have been verified successfully by the experimental measurements.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.1051-1054
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• 2009

This paper investigates approaches for improving effective mobility of organic thin film transistors (OTFTs). We consider gate dielectric optimization, whereby we demonstrated >2x increase in mobility by using a silicon-rich silicon nitride ($SiN_x$) gate dielectric for polythiophene-based (PQT) OTFTs. We also engineer the dielectric-semiconductor ($SiN_x$-PQT) interface to attain a 27x increase in mobility (up to 0.22 $cm^2$/V-s) using an optimized combination of oxygen plasma and OTS SAM treatments. Augmentative material systems by combining 1-D nanomaterials (e.g., carbon nanotubes, zinc oxide nanowires) in an organic matrix for nanocomposite OTFTs provided a further boost in device performance.