• 전기학회논문지
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• 제67권6호
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• pp.799-803
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• 2018

We demonstrated memory thin-film transistors (MTFTs) with organic ferroelectric polymer poly(vinylidene fluoride-co-trifluoroethylene) and an amorphous oxide semiconducting indium gallium zinc oxide channel on the elastomeric substrate. The dielectric constant for the P(VDF-TrFE) thin film prepared on the elastomeric substrate was calculated to be 10 at a high frequency of 1 MHz. The voltage-dependent capacitance variations showed typical butterfly-shaped hysteresis behaviors owing to the polarization reversal in the film. The carrier mobility and memory on/off ratio of the MTFTs showed $15cm^2V^{-1}s^{-1}$ and $10^6$, respectively. This result indicates that the P(VDF-TrFE) film prepared on the elastomeric substrate exhibits ferroelectric natures. The fabricated MTFTs exhibited sufficiently encouraging device characteristics even on the elastomeric substrate to realize mechanically stretchable nonvolatile memory devices.

• Transactions on Electrical and Electronic Materials
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• 제12권6호
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• pp.258-261
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• 2011

A ferroelectric $(Bi,La)_4Ti_3O_{12}$ (BLT) thin film fabricated by the pulsed-DC sputtering method was evaluated on a cell structure to check its compatibility to high density ferroelectric random access memory (FeRAM) devices. The BLT composition in the sputtering target was $Bi_{4.8}La_{1.0}Ti_{3.0}O_{12}$. Firstly, a BLT film was deposited on a buried Pt/$IrO_x$/Ir bottom electrode stack with W-plug connected to the transistor in a lower place. Then, the film was finally crystallized at $700^{\circ}C$ for 30 seconds in oxygen ambient. The annealed BLT layer was found to have randomly oriented and small ellipsoidal-shaped grains (long direction: ~100 nm, short direction: ~20 nm). The small and uniform-sized grains with random orientations were considered to be suitable for high density FeRAM devices.

• Journal of Power Electronics
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• 제14권2호
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• pp.257-264
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• 2014

A novel converter-free AC LED driver that is highly resistant to the fluctuation of AC voltage is proposed in this study. By removing large passive components, such as the bulky capacitor and the large-value inductor, the integration of the driver circuit is enhanced while the driving current remains stable. The proposed circuit provides LED lamps with a driving current that can follow the sinusoid waveform to obtain a very high power factor (PF) and low total harmonic distortion (THD). The LED input current produced by this driving current is insensitive to fluctuations in the AC voltage. Users will thus not feel that LED lamps are flashing during the fluctuation. Experiment results indicate that the proposed system can obtain PF of 0.999 and THD as low as 3.3% for a five-string 6 W LED load under 220 V at 50 Hz.

• 대한전자공학회논문지SD
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• 제37권4호
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• pp.1-6
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• 2000

최근에 빠른 쓰기/읽기 속도, 적은 소비 전력과 비휘발성을 가지는 메모리 캐패시터의 유전 재료로서 SrBi/sub 2/Ta/sub 2/O/sub 9/(SBT)에 대한 관심이 집중되고 있다. 강유전체 물질을 이용한 고밀도 FeRAM을 생산하기 위하여서는 식각에 의한 패턴이 형성되어야 한다. 강유전체 물질의 성장과 그 전기적 특성에 관한 연구와 발표는 많이 발표 되고 있다. 그러나, 강유전체 물질의 식각의 어려움 때문에 SBT 박막 식각에 관한 연구는 거의 전무하다고 할 수 있다. 그러므로, SBT 박막의 식각의 특성을 알아보기 위하여, SBT 박막은 CF/sub 4/Ar 가스 플라즈마를 이용하여 MEICP로 식각 되어졌다. XPS를 이용하여 식각 된 SBT 박막의 표면에서의 화학 반응을 분석하였고, XPS 분석을 검증하기 위하여 SIMS 분석을 하여 비교하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 추계학술대회 논문집
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• pp.41-43
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• 1999

Among the feffoelectric thin films that have been widely investigated for ferroelectric random access memory (FRAM) applications, SrBi$_2$Ta$_2$$O_{9}$ thin film is appropriate to memory capacitor materials for its excellent fatigue endurance. However, very few studies on etch properties of SBT thin film have been reported although dry etching is an area that demands a great deal of attention in the very large scale integrations. In this study, the a SrBi$_2$Ta$_2$$O_{9}$ thin films were etched by using magnetically enhanced inductively coupled Ar/CHF$_3$ plasma. Etch properties, such as etch rate, selectivity, and etched profile, were measured according to gas mixing ratio of CHF$_3$(Ar$_{7}$+CHF$_3$) and the other process conditions were fixed at RF power of 600 W, dc bias voltage of 150 V, chamber pressure of 10 mTorr. Maximum etch rate of SBT thin films was 1750 A77in, under CHF$_3$(Ar+CHF$_3$) of 0.1. The selectivities of SBT to Pt and PR were 1.35 and 0.94 respectively. The chemical reaction of etched surface were investigated by X-ray photoelectron spectroscopy (XPS) analysis. The Sr and Ta atoms of SBT film react with fluorine and then Sr-F and Ta-F were removed by the physical sputtering of Ar ion. The surface of etched SBT film with CHF$_3$(Ar+CHF$_3$) of 0.1 was analyzed by secondary ion mass spectrometer (SIMS). Scanning electron microscopy (SEM) was used for examination of etched profile of SBT film under CHF$_3$(Ar+CHF$_3$) of 0.1 was about 85˚.85˚.˚.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 추계학술대회 논문집
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• pp.33-36
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• 1999

In this paper, $Ba_{0.5}$Sr$_{0.5}$TiO$_3$ thin-films were prepared on Pt/Ti/Si0$_2$/Si substrates by RF magnetron sp-uttering method. We investigated electric and dielectric properties of BST thin-films with various ann-ealing temperature using in-sute RTA. Deposition conditions of BST films were set substrate temperat-ure, 30$0^{\circ}C$ and working gas ratio, Ar:O$_2$=90:10. After BST films deposited, we fabricated a capacitor of MIM structure with Al top electrode for measurement. Post-annealing using RTA performed at 40$0^{\circ}C$, $600^{\circ}C$, 80$0^{\circ}C$ for 60 sec, respectively. Also we exacted crystallization and composition of BST thin-films by XRD analysis. In measurement result, this capacitors showed a dielectric constant of about 200 at 1MHz and leakage current density of 5$\times$10$^{-8}$ A/$\textrm{cm}^2$ at 1.5V Microstructure of BST thin-films exhibited effective quality in low-temperature annealed 71ms than high-temperature annealed 71ms.s.s.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2005년도 춘계학술발표대회 및 제8회 신소재 심포지엄 논문개요집
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• pp.108-108
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• 2005

• 한국재료학회:학술대회논문집
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• 한국재료학회 2005년도 춘계학술발표대회 및 제8회 신소재 심포지엄 논문개요집
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• pp.128-128
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• 2005

• 한국재료학회:학술대회논문집
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• 한국재료학회 2005년도 춘계학술발표대회 및 제8회 신소재 심포지엄 논문개요집
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• pp.130-130
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• 2005

• 한국전기전자재료학회논문지
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• 제11권1호
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• pp.33-40
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• 1998

The composite SiO$_2$/Si$_3$N$_4$/SiO$_2$(ONO) film formed by oxidation on nitride film has been widely studied as DRAM stacked capacitor multi-dielectric films. Load lock(L/L) LPCVD system by HF cleaning is used to improve electrical capacitance and to scale down of effective thickness for memory device, but is brings a new problem. Nitride film deposited using HF cleaning shows selective deposition on poly silicon and oxide regions of capacitor. This problem is avoidable by carpeting chemical oxide using $H_2O$$_2$cleaning before nitride deposition. In this paper, we study the limit of nitride thickness for abnormal oxidation and the initial deposition time for nitride deposition dependent on underlayer materials. We proposed an advanced fabrication process for stacked capacitor in order to avoid selective deposition problem and show the usefulness of nitride deposition using L/L LPCVD system by $H_2O$$_2$cleaning. The natural oxide thickness on polysilicon monitor after HF and $H_2O$$_2$cleaning are measured 3~4$\AA$, respectively. Two substrate materials have the different initial nitride deposition times. The initial deposition time for polysilicon is nearly zero, but initial deposition time for oxide is about 60seconds. However the deposition rate is constant after initial deposition time. The limit of nitride thickness for abnormal oxidation under the HF and $H_2O$$_2$cleaning method are 60$\AA$, 48$\AA$, respectively. The results obtained in this study are useful for developing ultra thin nitride fabrication of ONO scaling and for avoiding abnormal oxidation in stacked capacitor application.