• Proceedings of the Korean Society for Quality Management Conference
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• 2010.04a
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• pp.262-268
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• 2010

Organic light emitting diode is developed fast from 1963 after discovering electric light emitting phenomenon. First PMOLED(passive matrix OLED) product is manufactured and AMOLED(active matrix OLED) using TFT(thin film ransistor) is now in the center. PMOLED is mainly mounted at sub display. but AMOLED is mounted at main display. Also AMOLED expand the market to PMP(portable multimedia players), navigation and TV. Even thought OLED's market is opening to many applications, OLED is worried about lifetime until now. That's appeared in market in a very short time and is not known well about result of OLED's lifetime and reliability test. And there is no standard ssessment method and not enough study to standardization the method. A study's purpose is reduce the time for life test by accelerated current and it can do production possible design by accelerated life model in design phase. It's must be add to process variables and design variables(like ratio of light emitting, organic material structure, condition of aging, etc) to make the best use of supplied accelerated lifetime model in this paper. In terms of lifetime it needs each criterion of applications because of image sticking. In conclusion, it's possible to discover new defect because there is not much time to be opened in market and develop a method of manufacturing process & materials, so we need to study on the subject of this paper continuously.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.1
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• pp.49-53
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• 2011

Diamond-like carbon (DLC) films is a metastable form of amorphous carbon containing a significant fraction of Sp3 bond. DLC films have been characterized by a range of attractive mechanical, chemical, tribological, as well as optical and electrical properties. In this study DLC films were prepared by the RF magnetron sputter system on $SiO_2$ substrates using graphite target. The effects of the post annealing temperature on the Property variation of the DLC films were examined. The DLC films were annealed at temperatures ranging from 300 to $500^{\circ}C$ using rapid thermal process equipment in vacuum. The variation of electrical property and surface morphology as a function of annealing treatment was investigated by using a Hall Effect measurement and atomic force microscopy. Raman and X-ray photoelectron spectroscopy analyses revealed a structural change in the DLC films.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.04b
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• pp.55-56
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• 2009

Small RFID tag antenna were fabricated on Si substrate and their physical and electrical properties were evaluated. With decreasing the size of tag antenna on Si substrate, small SMD-type RFID tags could be fabricated, which is very useful for PCB tracking. Firstly, tag antenna pattern and the electromagnetic properties were simulated with HFSS. The frequency was 13.56MHz, the line-width and line-gap were modeled in the range of $50{\sim}200{\mu}m$. S parameters, SRF, and Q value were calculated from geometry. When the line-width and line-gap were 100um and the loop-turn was 10, the SRF was 80MHZ and the Q value was ca. 9. When the microstrip antenna pattern of aluminum was fabricated by using DC sputtering, Vpp of ca. 1.6V was obtained when the reader-tag distance was 40mm.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.305-305
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• 2010

It is known that a pulse of electrons of high kinetic energy (1-3 eV) in metals can be generated with the deposition of external energy to the surface such as in the absorption of light or in exothermic chemical processes. These energetic electrons are not in thermal equilibrium with the metal atoms and are called "hot electrons" The concept of photon energy conversion to hot electron flow was suggested by Eric McFarland and Tang who directly measured the photocurrent on gold thin film of metal-semiconductor ($TiO_2$) Schottky diodes [1]. In order to utilize this scheme, we have fabricated metal-semiconductor Schottky diodes that are made of Pt or Au as a metallic layer, Si or $TiO_2$ as a semiconducting substrate. The Pt/$TiO_2$ and Pt/Si Schottky diodes are made by PECVD (Plasma Enhanced Chemical Vapor Deposition) for $SiO_2$, magnetron sputtering process for $TiO_2$, e-beam evaporation for metallic layers. Metal shadow mask is made for device alignment in device fabrication process. We measured photocurrent on Pt/n-Si diodes under AM1.5G. The incident photon to current conversion efficiency (IPCE) at different wavelengths was measured on the diodes. We also show that the steady-state flow of hot electrons generated from photon absorption can be directly probed with $Pt/TiO_2$ Schottky diodes [2]. We will discuss possible approaches to improve the efficiency of photon energy conversion.

• Journal of the Korean Society of Industry Convergence
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• v.23 no.1
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• pp.25-32
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• 2020

Generally, high-temperature, high-pressure, high-priced sintering equipment is used for diamond sintering, and conductivity is a problem for improving the surface modification of the sintered body. In this study, to improve the efficiency of diamond sintering, we identified a new process and material that can be sintered at low temperature, and attempted to develop a composite thin film that can be discharged by doping boron gas to improve the surface modification of the sintered body. Sintered bodies were sintered by mixing Si and two diamonds in different particle sizes based on CIP molding and HIP molding. In CVD deposition, CVD was performed using WC-Co cemented carbide using CH₄ and H₂ gas, and the specimen was made conductive using boron gas. According to the experimental results of the sintered body, as the Si content is increased, the Vickers hardness decreases drastically, and the values of tensile strength, Young's modulus and fracture toughness greatly increase. Conductive CVD deposited diamond was boron deposited and discharged. As the amount of boron added increased, the strength of diamond peaks decreased and crystallinity improved. In addition, considering the release processability, tool life and adhesion of the deposition surface according to the amount of boron added, the appropriate amount of boron can be confirmed. Therefore, by solving the method of low temperature sintering and conductivity problem, the possibility of solving the existing sintering and deposition problem is presented.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.193-193
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• 2011

To obtain ceramic films, the sol-gel coating technique has been broadly used with heat treatment, but crack formation tend to occur during heat treatment in thick sol-gel films. We prepared PZT thin films by sol-gel method with single-step spin coating process. The PZT solution have been synthesized using lead acetate ($Pb(CH_3COO)_2$), zirconium acetylacetonate ($Zr(OC_3H_7^n)_4$), and titanium diisopropoxide bis(acetylacetonate) 75wt% in isopropanol ($Ti(OC_3H_7^i)_2(OC_3H_7^n)_2$) as starting materials and n-propanol was selected as a solvent. The poly(vynilpyrrolidone) (PVP) was added with 0, 0.25, 0.5, 0.75, and 1 molar ratios to control viscosity of solution. We investigated influence of the viscosity on thickness, microstructure, and electrical properties of final PZT films. Thermo-gravimetric analysis and differential scanning calorimeter (TGA/DSC) was carried out from room temperature to $800^{\circ}C$ in order to measure pyrolysis temperature. Structural characteristics were analyzed by X-ray diffraction (XRD) and scanning electron microscopy (SEM). Ferroelectric and dielectric properties were measured by RT66A (Radiant) and impedance analyzer (Agilent), respectively. The thicknesses of PZT films depended on incorporation of an excess amount of PVP. Finally, we obtained PZT films of good quality without crack formation via single-step spin coating.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.3
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• pp.71-74
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• 2013

In this study, the effects of wafer warpage on the misalignment during wafer stacking process were investigated. The wafer with $45{\mu}m$ bow height warpage was purposely fabricated by depositing Cu thin film on a silicon wafer and the bonding misalignment after bonding was observed to range from $6{\mu}m$ to $15{\mu}m$. This misalignment could be explained by a combination of $5{\mu}m$ radial expansion and $10{\mu}m$ linear slip. The wafer warpage seemed to be responsible for the slip-induced misalignment instead of radial expansion misalignment.

• Transactions on Electrical and Electronic Materials
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• v.10 no.3
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• pp.93-96
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• 2009

The Al-doped ZnO (AZO) films were deposited on a glass substrate by RF magnetron sputtering in pure Ar and $Ar+H_2$ gas ambient at temperature of $100^{\circ}C$ and annealed in hydrogen ambient at the temperature range from 100 to 300 $^{\circ}C$, respectively. It was found that either the addition of hydrogen to the sputtering gas or the annealing treatment effectively reduced the resistivity of the AZO films. When the AZO films were annealed at the temperature of 300 $^{\circ}C$ for lhr in a hydrogen atmosphere, the resistivity decreased from $2.60{\times}10^{-3}\;{\Omega}cm$ to $8.42{\times}l0^{-4}\;{\Omega}cm$ for the film deposited in pure Ar gas ambient. Under the same annealing conditions of temperature and hydrogen ambient, the resistivity of AZO films deposited in the $Ar+H_2$ gas mixture decreased from $8.22{\times}l0^{-4}\;{\Omega}cm$ to $4.25{\times}l0^{-4}\;{\Omega}cm$. The lowest resistivity of $4.25{\times}l0^{-4}\;{\Omega}cm$ was obtained by adding hydrogen gas to the deposition and annealing process. X-ray diffraction (XRD) pattern of all films showed preferable growth orientation of (002) plane. The average transmittance is above 85 % and in the range of 400-1000 nm for all films.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.502-502
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• 2007

Current thin film process using memory device fabrication process use expensive processes such as manufacturing of photo mask, coating of photo resist, exposure, development, and etching. However, direct printing technology has the merits about simple and cost effective processes because inks are directly injective without mask. And also, this technology has the advantage about fabrication of fine pattern line on various substrates such as PCB, FCPB, glass, polymer and so on. In this work, we have fabricated the fine and thick metal pattern line for the electronic circuit board using metal ink contains Ag nano-particles. Metal lines are fabricated by two types of printing methods. One is a conventional printing method which is able to quick fabrication of fine pattern line, but has various difficulties about thick and high resolution DPI(Dot per Inch) pattern lines because of bulge and piling up phenomenon. Another(Second) methods is sequential printing method which has a various merits of fabrication for fine, thick and high resolution pattern lines without bulge. In this work, conductivities of metal pattern line are investigated with respect to printing methods and pattern thickness. As a result, conductivity of thick pattern is about several un.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.10
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• pp.821-825
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• 2009

Recently, transparent ZnO-based TFTs have attracted much attention for flexible displays because they can be fabricated on plastic substrates at low temperature. We report the fabrication and characteristics of ZnO TFTs having different channel thicknesses deposited at low temperature. The ZnO films were deposited as active channel layer on $Si_3N_4/Ti/SiO_2/p-Si$ substrates by RF magnetron sputtering at $100^{\circ}C$ without additional annealing. Also, the ZnO thin films deposited at oxygen partial pressures of 40%. ZnO TFTs using a bottom-gate configuration were investigated. The $Si_3N_4$ film was deposited as gate insulator by PE-CVD at $150^{\circ}C$. All Processes were processed below $150^{\circ}C$ which is optimal temperature for flexible display and were used dry etching method. The fabricated devices have different threshold slop, field effect mobility and subthreshold slop according to channel thickness. This characteristics are related with ZnO crystal properties analyzed with XRD and SPM. Electrical characteristics of 60 nm ZnO TFT (W/L = $20\;{\mu}m/20\;{\mu}m$) exhibited a field-effect mobility of $0.26\;cm^2/Vs$, a threshold voltage of 8.3 V, a subthreshold slop of 2.2 V/decade, and a $I_{ON/OFF}$ ratio of $7.5\times10^2$.