• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.158-158
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• 2009

This paper focuses on improving organic thin film transistor (OTFT) characteristics by controlling the self-organization of pentacene molecules with an alignable high-dielectric-constant film. The process, based on the growth of pentacene film through high-vacuum sublimation, is a method of self-organization using ion-beam (IB) bombardment of the $HfO_2/Al_2O_3$ surface used as the gate dielectric layer. X-ray photoelectron spectroscopy indicates that the IB raises the rate of the structural anisotropy of the $HfO_2/Al_2O_3$film, and X-ray diffraction patterns show the possibility of increasing the anisotropy to create the self-organization of pentacene molecules in the first polarized monolayer. An effective mobility of $2.3{\times}10^{-3}cm^2V^{-1}s^{-1}$ was achieved, which is significantly different from that of pentacene films that are not aligned. The proposed OTFT devices with an ultrathin $HfO_2$ structure as the gate dielectric layer were operated at a gate voltage lower than 5 V.

• Journal of the Korean institute of surface engineering
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• v.54 no.6
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• pp.324-330
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• 2021

As energy harvesting technology becomes important in relation to environmental issues, piezoelectric materials that convert mechanical energy into electrical energy are attracting attention. However, PZT, a representative material for piezoelectricity, is becoming difficult to use due to the problem that its components can cause environmental pollution. For this reason, recent research suggests a triboelectric nanogenerator (TENG) that generates energy through the combined effect of triboelectricity and electric induction for alternative piezoelectric devices. In TENG, electrical power is determined by the dielectric constant, thickness, and grain generation of the charged material. Therefore, in this study, a Rutile phase TiO₂ thin film with high dielectric constant was formed using the spin-coating process and the effect of annealing was investigated. For electrical analysis, a TENG device was fabricated using PTFE as a material with an opposite charge, and electrical output according to film thickness and grain formation was comparatively analyzed.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.41.2-41.2
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• 2011

Recently, scaling down of ULSI (Ultra Large Scale Integration) circuit of CMOS (Complementary Metal Oxide Semiconductor) based electronic devices become much faster speed and smaller size than ever before. However, very narrow interconnect line width causes some drawbacks. For example, deposition of conformal and thin barrier is not easy moreover metallization process needs deposition of diffusion barrier and glue layer. Therefore, there is not enough space for copper filling process. In order to overcome these negative effects, simple process of copper metallization is required. In this research, Cu-V thin alloy film was formed by using RF magnetron sputter deposition system. Cu-V alloy film was deposited on the plane $SiO_2$/Si bi-layer substrate with smooth and uniform surface. Cu-V film thickness was about 50 nm. Cu-V layer was deposited at RT, 100, 150, 200, and $250^{\circ}C$. XRD, AFM, Hall measurement system, and XPS were used to analyze Cu-V thin film. For the barrier formation, Cu-V film was annealed at 200, 300, 400, 500, and $600^{\circ}C$ (1 hour). As a result, V-based thin interlayer between Cu-V film and $SiO_2$ dielectric layer was formed by itself with annealing. Thin interlayer was confirmed by TEM (Transmission Electron Microscope) analysis. Barrier thermal stability was tested with I-V (for measuring leakage current) and XRD analysis after 300, 400, 500, 600, and $700^{\circ}C$ (12 hour) annealing. With this research, over $500^{\circ}C$ annealed barrier has large leakage current. However V-based diffusion barrier annealed at $400^{\circ}C$ has good thermal stability. Thus, thermal stability of vanadium-based thin interlayer as diffusion barrier is good for copper interconnection.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.45-45
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• 2007

Capacitors among the embedded passive components are most widely studied because they are the major components in terms of size and number and hard to embed compared with resistors and inductors due to the more complicated structure. To fabricate a capacitor-embedded PCB for in-line process, it is essential to adopt a low temperature process (<$200^{\circ}C$). However, high dielectric materials such as ferroelectrics show a low permittivity and a high dielectric loss when they are processed at low temperatures. To solve these contradicting problems, we studied BMN materials as a candidate for dielectric capacitors. processed at PCB-compatible temperatures. The morphologies of BMN thin films were investigated by AFM and SEM equipment. The electric properties (C-F, I-V) of Pt/BMN/Cu/polymer were evaluated using an impedance analysis (HP 4194A) and semiconductor parameter analyzer (HP4156A). $Bi_2Mg_{2/3}Nb_{4/3}O_7$(BMN) thin films deposited on copper clad laminate substrates by sputtering system as a function of Ar/$O_2$ flow rate at room temperature showed smooth surface morphologies having root mean square roughness of approximately 5.0 nm. 200-nm-thick films deposited at RT exhibit a dielectric constant of 40, a capacitance density of approximately $150\;nF/cm^2$, and breakdown voltage above 6 V. The crystallinity of the BMN thin films was studied by TEM and XRD. BMN thin film capacitors are expected to be promising candidates as embedded capacitors for printed circuit board (PCB).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05d
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• pp.86-89
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• 2003

SBT thin film for semiconductor device that is made by RF magnetron sputtering method studied electrical properties under various temperature condition. Dielectric constant who differ annealing condition appears highest in $750[^{\circ}C]$ and it is 213. Also, C-V properties by annealing temperature of SBT thin film for semiconductor device is no change almost to $600[^{\circ}C]$ and shows non-linear butterfly shape more than $650[^{\circ}C]$ Maximum capacitance and difference of smallest capacitance show the biggest difference in $750[^{\circ}C]$ as degree that domain wall motion contributes in ferrelectric polarization value in C-V characteristic curve of ferroelectric that this shows typical ferroelectric properties. Therefore, SBT thin film for semiconductor device that is annealing in $750[^{\circ}C]$ expressed the most superior electrical and ferroelectric properties.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2002.11a
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• pp.329-334
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• 2002

This study evaporates TiO$_2$ layer thickness differently with RF sputtering method on Si Wafer(n-100). Thin film is made with the structure of Si+TiO$_2$ and Si+TiO$_2$+Al by evaporating TiN which is used as Antireflection of superintegrated semiconductor integrated circuit with Photo Catalyst. The research is performed to increase the characteristics of photon energy according to TiO$_2$ thickness and the reliability and reproducibility of TiO$_2$ thin film. Reversal of electric Permittivity values is induced by dipole polarization shown in the dielectric of thin film. Complex electric constant ($\varepsilon$$_1$, $\varepsilon$$_2$) has larger peak values as it's thickness is thinner and then it is larger according to the increase of frequency. Electric Permittivity by photon energy has large value in imaginary number and is reduced exponentially by the increase of carrier density according to that of photon energy.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.195-198
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• 1999

A Bi$_4$Ti$_3$O$_{12}$ (BIT) thin film is prepared by sol-gel method using acetate precursors and evaluated whether it could be applied to NVFRAM. The drying and the annealing temperature are 40$0^{\circ}C$ and $650^{\circ}C$, respectively and they are determined from the DT-TG analysis. The BIT thin film deposited on Pt/Ta/SiO$_2$/Si substrate shows orthorhombic perovskite phase. The grain size and the surface roughness are about 100 nm and 70.2$\AA$, respectively. The dielectric constant and the loss tangent at 10 KHz are 176 and 0.038, respectively, and the leakage current density at 100㎸/cm is 4.71$mutextrm{A}$/$\textrm{cm}^2$. In the results of hysteresis loops measured at $\pm$250㎸/cm, the remanent polarization (Pr) and the coercive field (Ec) are 5.92$mutextrm{A}$/$\textrm{cm}^2$ and 86.3㎸/cm, respectively. After applying 10$^{9}$ square pulses of $\pm$5V, the remanent polarization of the BIT thin film decreases as much as about 33% from 5.92 $\mu$C/$\textrm{cm}^2$ of initial state to 3.95 $\mu$C/$\textrm{cm}^2$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.2
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• pp.110-118
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• 2002

Organic thin film transitors(OTFT) are of interest for use in broad area electronic applications. And recently organic electroluminescent devices(OELD) have been intensively investigated for using in full-color flat-panel display. We have fabricated inverted-staggered structure OTFTs at lower temperature using the fused-ring polycyclic aromatic hydrocarbon pentacene as the active eletronic material and photoacryl as the organic gate insulator. The field effect mobility is 0.039∼0.17 ㎠/Vs, on-off current ratio is 10$\^$6/, and threshold voltage is -7V. And here we report the study of driving emitting, Ir(ppy)$_3$, phosphorescent OELD with all organic thin film transistor and investigated its electrical characteristics. The OELD with a structure of ITO/TPD/8% Ir(ooy)$_3$ doped in BCP/BCP/Alq$_3$/Li:Al/Al and OTFT with a structure of inverted-stagged Al(gate electrode)/photoacry(gate insulator)/pentacene(p-type organic semiconductor)/ Au(source-drain electrode) were fabricated on the ITP patterned glass substrate. The electrical characteristics are turn-on voltage of -10V, and maximum luminance of about 90 cd/㎡. Device characteristics were quite different with that of only OELD.

• Korean Journal of Materials Research
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• v.3 no.1
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• pp.19-27
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• 1993

Abstract The PZT thin film was deposited by usin. RF magnetron sputtering with PZT(52/48) target. The formation of perovskite structure PZT thin film started at 55$0^{\circ}C$ on Si substrate. The AES results showed an oxide layer formed at the between Si and PZT film during the annealing. And, Ti$O_2$ layer appeared at the between TiN and PZT film for the annealing. But, the perovskite phase PZT film was formed after the annealing on the Si$O_2$/Si substarte. The ratio in PZT film was constant across the asdeposited PZT film, but, Pb have diffused into the Si substrate and Si have out-diffused into PZT layer during the post annealing at 75$0^{\circ}C$. The dielectric constants of PZT film indicated about 1300( thickness: 1500$\AA$, at 10KHz) but, the cracks were appeared to surface for annealing.

• Proceedings of the KIEE Conference
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• 1998.07d
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• pp.1508-1510
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• 1998

Recent development of scanning probe microscope techniques has made it possible to investigate, not only microscopic surface topography, but also physical and chemical properties on the nanometer-scale. The scanning Maxwell-stress microscopy (SMM) is surface characterization tool capable of mapping both the surface topography and electrical properties, such as surface potential, surface charge dielectric constant of thin films with a nanometer-scale resolution by means of the AC voltage driven oscillation of metal coated cantilever. In this study, we observed the surface potential distribution and molecular ordering in thin films. We have demonstrated that the SMM can be used for imaging surface potential distribution over the film surface and also be used for detecting surface changes in thin films. This is first step towards the understanding of electrical phenomena in organic and inorganic materials, biological system with SMM.