• Title/Summary/Keyword: Thin Dielectric Film

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Characteristics of Pentacene Organic Thin-Film Transistors with $PVP-TiO_2$ as a Gate Insulator

  • Park, Jae-Hoon;Kang, Sung-In;Jang, Seon-Pil;Kim, Hyun-Suck;Choi, Hyoung-Jin;Choi, Jong-Sun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1301-1305
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    • 2005
  • The performance of OTFT with $PVP-TiO_2$ composite, as a gate insulator, is reported, including the effect of surfactant for synthesizing the composite material. According to our investigation results, it was one of critical issues to prevent the aggregation of $PVP-TiO_2$ particles during the synthesis process. From this point of view, $PVP-TiO_2$ particles were treated using Tween80, as a surfactant, and we could reduce the aggregated $PVP-TiO_2$ clusters. As a result, the OTFT with the composite insulator showed the threshold voltage of about -8.3 V and the subthreshold slope of about 1.5 V/decade, which are the optimized properties compared to those of OTFTs with bare PVP, in this study. It is thought that these characteristic improvements are originated from the increase in the dielectric constant of the PVP-based insulator by compositing with high-k particles.

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Studies on the fabrication of transmission line with high and low $Z_0$ using BCB layer (BCB를 이용한 High & Low$Z_0$전송선로 제작에 대한 연구)

  • 한효종;이성대;전영훈;윤관기;김삼동;황인석;이진구;류기현
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.57-60
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    • 2002
  • In this paper, transmission lines with low and high characteristic impedance (Z$_{0}$) are fabricated and analyzed. The transmission lines are fabricated on the benzo-cyclo-butene (BCB) films of a low dielectric constant. For the low Z$_{0}$, two types of coplanar waveguide (CPW) structures are fabricated, which include bottom-ground and double-ground type. Measurement shows that Z$_{0}$ values for each CPW type are 7.3 and 9.4$\Omega$, respectively, at a signal line width of 100 #m. Whit the ratio between the spacing of bottom-ground and the signal line with becomes greater than 2.5, the Z$_{0}$ is nearly saturated. In addition, thin film microstrip lines fabricated using the BCB insertion layers show very low Z$_{0}$ of 25.5$\Omega$, and this impedance is ~64 % of the values obtained from the BCB-based CPW structures of the same line width. Measurement result of CPW on BCB layer is 100.5 Ω.s 100.5 Ω.

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Structural and Ferroelectric Properties of PZT Thin Films Deposited on SrRuO3 Electrode Films (SrRuO3 전극 박막 위에 증착된 PZT 박막의 구조 및 강유전 특성)

  • Lee, Myung Bok
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.29 no.10
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    • pp.620-624
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    • 2016
  • Ferroelectric $Pb(Zr_{0.52}Ti_{0.48})O_3$ (PZT) films were deposited on SrTiO3(100) substrate by using conductive $SrRuO_3$ films as underlayer and their structural and ferroelectric properties were investigated. PZT films were grown in (00l) orientation on well lattice-matched pseudo-cubic $SrRuO_3$ films. Thickness dependence of ferroelectric and electrical properties of PZT films was investigated. PZT film with 400 nm thickness showed a remanent polarization ($P_r$) of $29.0{\mu}C/cm^2$ and coercive field ($E_c$) of 83 kV/cm, and $P_r$ decreased and $E_c$ increased with thickness reduction. The dielectric constant for PZT films showed gradual decrease with thickness reduction. Breakdown field of PZT films did not show the thickness dependence and displayed as high value as 1 MV/cm.

Properties of the oxynitride films formed by thermal reoxidation in $N_2{O}$ gas ($N_2{O}$가스로 재산화시킨 oxynitride막의 특성)

  • 김태형;김창일;최동진;장의구
    • Electrical & Electronic Materials
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    • v.7 no.1
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    • pp.25-31
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    • 1994
  • Properties of oxynitride films reoxidized by $N_2{O}$ gas after thermal oxidation and $N_2{O}$ oxide films directly oxidized by using $N_2{O}$ gas on the bare silicon wafer have been studied. From the AES analysis, nitrogen pile-up at the interface of Si/oxynitride and Si/$N_2{O}$ oxide has observed. $N_2{O}$ oxide and oxynitride films have the self-limited characteristics. Therefore, it will be possible to obtain ultra-thin films. Nitrogen pile-up at the interfaces of Si/oxynitride and Si/$N_2{O}$ oxide strengthens film structure and improves dielectric reliability. Although fixed charge densities and interface trap densities of N20 oxide and oxynitride films have somewhat higher than those of thermal $SiO_2{O}$, $N_2{O}$ oxide and oxynitride films showed improved I-V characteristics and constant current stress.

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Organic Thin-Film Transistors Fabricated on Flexible Substrate by Using Nanotransfer Molding

  • Hwang, Jae-Kwon;Dang, Jeong-Mi;Sung, Myung-Mo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.287-287
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    • 2010
  • We report a new direct patterning method, called liquid bridge-mediated nanotransfer molding (LB-nTM), for the formation of two- or three-dimensional structures with feature sizes between tens of nanometers and tens of micron over large areas. LB-nTM is based on the direct transfer of various materials from a mold to a substrate via a liquid bridge between them. This procedure can be adopted for automated direct printing machines that generate patterns of functional materials with a wide range of feature sizes on diverse substrates. Arrays of TIPS-PEN TFTs were fabricated on 4" polyethersulfone (PES) substrates by LB-nTM using PDMS molds. An inverted staggered structure was employed in the TFT device fabrication. A 150 nm-thick indium-tin oxide (ITO) gate electrode and a 200 nm-thick SiO2dielectric layer were formed on a PES substrate by sputter deposition. An array of TIPS-PEN patterns (thickness: 60 nm) as active channel layers was fabricated on the substrate by LB-nTM. The nominal channel length of the TIPS-PEN TFT was 10 mm, while the channel width was 135 mm. Finally, the source and drain electrodes of 200 nm-thick Ag were defined on the substrate by LB-nTM. The TIPS-PEN TFTs can endure strenuous bending and are also transparent in the visible range, and therefore potentially useful for flexible and invisible electronics.

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The Effects of MgO Activation Process on the Discharge Characteristics of AC PDP (AC PDP 의 방전 특성에 미치는 MgO 활성화 영향에 관한 연구)

  • Kim, Young-Kee;Kim, Jun-Ho;Sohn, Je-Bong;Park, Byeong-Eon;Park, Myung-Joo;Cho, Jung-Soo;Park, Chung-Hoo
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.48 no.3
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    • pp.209-214
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    • 1999
  • This paper deals with the effects of activation process of MgO thin film on the dielectric characteristics of surface discharge type AC PDP. The discharge voltage decreased with increase in the MgO activation time and temperature until $400^{\circ}C$ under the condition of clean high vacuum. However, for the sample activated above $430^{\circ}C$ the discharge voltage increased. These results may be explained by the MgO morphology change and surface cleaning in the process of activation.

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Polymer semiconductor based transistors for flexible display

  • Lee, Ji-Yeol;Lee, Bang-Rin;Kim, Ju-Yeong;Jeong, Ji-Yeong;Park, Jeong-Il;Jeong, Jong-Won;Gu, Bon-Won;Jin, Yong-Wan
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2012.05a
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    • pp.59.1-59.1
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    • 2012
  • Organic thin-film transistors (OTFTs) with printable semiconductors are promising candidate devices for flexible active-matrix (AM) display applications. Yet, stable operation of actual display panels driven by OTFTs has seldom been reported up to date. Here, we demonstrate a flexible reflective type polymer dispersed liquid crystal (PDLC) display, in which inkjet-printed OTFT arrays are used as driving elements with excellent areal uniformity in terms of device performance. As the active semiconductor, a novel, ambient processable conjugated copolymer was synthesized. The stability of the devices with respect to electrical bias stress was improved by applying a channel-passivation layer, which suppresses the environmental effects and hence reduces the density of trap states at the channel/dielectric interface. The combination of high performance and high stability OTFT devices enabled the successful realization of stable operating flexible color-displays by inkjet-printing.

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Electrical Characteristic Analysis of IGZO TFT with Poly (4-vinylphenol) Gate Insulator according to Annealing Temperature (Poly (4-vinylphenol) 게이트 절연체를 적용한 IGZO TFT의 열처리 온도에 따른 전기적 특성 분석)

  • Park, Jung Hyun;Jeong, Jun Kyo;Kim, Yu Jeong;Jun, Jung Byung;Lee, Ga Won
    • Journal of the Semiconductor & Display Technology
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    • v.16 no.1
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    • pp.97-101
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    • 2017
  • In this paper, IGZO thin film transistor (TFT) was fabricated with cross-linked Poly (4-vinylphenol) (PVP) gate dielectric for flexible, transparent display applications. The PVP is one of the candidates for low-temperature gate insulators. MIM structure was fabricated to measure the leakage current and evaluate the insulator properties according to the annealing temperature. Low leakage current ( <0.1nA/cm2 @ 1MV/cm ) was observed at $200^{\circ}C$ annealing condition and decreases much more as the annealing temperature increases. The electrical characteristics of IGZO TFT such as subthreshold swing, mobility and ON/OFF current ratio were also improved, which shows that the performance of IGZO TFTs with PVP can be enhanced by reducing the amount of incomplete crosslinking in PVP.

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Properties of Dielectric Constant and Bonding mode of Annealed SiOCH Thin Film (열처리한 SiOCH 박막의 결합모드와 유전상수 특성)

  • Kim, Jong-Wook;Hwang, Chang-Su;Park, Yong-Heon;Kim, Hong-Bae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.43-44
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    • 2008
  • PECVD 방식에 의거 low-k 유전상수를 갖는 층간 절연막 (ILD)를 제작하였다. 전구체 BTMSM 액체를 기화하여 16sccm 에서부터 1 sccm씩 증가하면서 25sccm 까지 p-Si[100] 기판위에 유량비를 조절하였으며 60 sccm으로 일정산소 $O_2$ 가스를 반응 챔버에 도달하도록 하였다. 제작된 시편의 구성성분은 FTIR의 흡수선으로 확인하였고, 알루미늄 전극을 구현한 MIS (Al/SiOCH/p-si(100)) 구조의 커패시터를 가지고 정전용량-전압 (C-V) 특성을 측정하여 유전상수를 계산하였다. BTMSM/$O_2$에 의한 층간절연막의 k ~ 2 근방의 저유전상수는 유량비에 민감하게 의존되고 열처리에 의하여 $CH_3$의 소멸 및 Si-O-Si(C) 성장하는 효과에 의하여 더 낮아짐을 확인할 수 있었다. 또한 상온 및 대기압에서 공기 중에 노출시켜 자연 산화과정을 겪은 시편들의 유전상수는 전체적으로 증가하였지만, 열처리한 박막이 상대적으로 안정화된 것을 확인하였다.

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Etching-Bonding-Thin film deposition Process for MEMS-IR SENSOR Application (MEMS-IR SENSOR용 식각-접합-박막증착 기반공정)

  • Park, Yun-Kwon;Joo, Byeong-Kwon;Park, Heung-Woo;Park, Jung-Ho;Yom, S.S.;Suh, Sang-Hee;Oh, Myung-Hwan;Kim, Chul-Ju
    • Proceedings of the KIEE Conference
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    • 1998.07g
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    • pp.2501-2503
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    • 1998
  • In this paper, the silicon-nitride membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PTO layer as a IR detection layer was deposited on the membrane and its characteristics were measured. The attack of PTO layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer can be solved through the method of bonding/etching of silicon wafer. Because the PTO layer of c-axial orientation raised thermal polarization without polling, the more integration capability can be achieved. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by IR detector, and the bonding interface was observed by SEM. The polarization characteristics and the dielectric characteristics of the PTO layer were measured, too.

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