• 제목/요약/키워드: The number of fault

검색결과 617건 처리시간 0.034초

A geometric approach to fault diagnosis algorithm in linear systems

  • Kim, Jee-Hong;Bien, Zeungnam
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1990년도 한국자동제어학술회의논문집(국제학술편); KOEX, Seoul; 26-27 Oct. 1990
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    • pp.1216-1221
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    • 1990
  • An algorithm for multiple fault diagnosis of linear dynamic systems is proposed. The algorithm is constructed by using of the geometric approach based on observation that, when the number of faulty units of the system is known, the set of faulty units can be differentiated from other sets by checking linear varieties in the measurement data space. It is further shown that the system with t number of faults can be diagnosed within (t+1) sample-time units if the input-output measurements are rich and that the algorithm can be used for diagnosis even when the number of faults is not known in advance.

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Process Fault Probability Generation via ARIMA Time Series Modeling of Etch Tool Data

  • Arshad, Muhammad Zeeshan;Nawaz, Javeria;Park, Jin-Su;Shin, Sung-Won;Hong, Sang-Jeen
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.241-241
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    • 2012
  • Semiconductor industry has been taking the advantage of improvements in process technology in order to maintain reduced device geometries and stringent performance specifications. This results in semiconductor manufacturing processes became hundreds in sequence, it is continuously expected to be increased. This may in turn reduce the yield. With a large amount of investment at stake, this motivates tighter process control and fault diagnosis. The continuous improvement in semiconductor industry demands advancements in process control and monitoring to the same degree. Any fault in the process must be detected and classified with a high degree of precision, and it is desired to be diagnosed if possible. The detected abnormality in the system is then classified to locate the source of the variation. The performance of a fault detection system is directly reflected in the yield. Therefore a highly capable fault detection system is always desirable. In this research, time series modeling of the data from an etch equipment has been investigated for the ultimate purpose of fault diagnosis. The tool data consisted of number of different parameters each being recorded at fixed time points. As the data had been collected for a number of runs, it was not synchronized due to variable delays and offsets in data acquisition system and networks. The data was then synchronized using a variant of Dynamic Time Warping (DTW) algorithm. The AutoRegressive Integrated Moving Average (ARIMA) model was then applied on the synchronized data. The ARIMA model combines both the Autoregressive model and the Moving Average model to relate the present value of the time series to its past values. As the new values of parameters are received from the equipment, the model uses them and the previous ones to provide predictions of one step ahead for each parameter. The statistical comparison of these predictions with the actual values, gives us the each parameter's probability of fault, at each time point and (once a run gets finished) for each run. This work will be extended by applying a suitable probability generating function and combining the probabilities of different parameters using Dempster-Shafer Theory (DST). DST provides a way to combine evidence that is available from different sources and gives a joint degree of belief in a hypothesis. This will give us a combined belief of fault in the process with a high precision.

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자속구속형 고온초전도 사고전류 제한기의 히스테리시스 특성 분석 (Analysis on Hysteresis Characteristics of Flux-Lock Type HTSC Fault Current Limiter)

  • 임성훈;한병성;박형민;조용선;한태희;두호익;최효상
    • 한국조명전기설비학회:학술대회논문집
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    • 한국조명전기설비학회 2006년도 춘계학술대회 논문집
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    • pp.493-495
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    • 2006
  • The hysteresis characteristics of flux-lock reactor, which is an essential component of flux-lock type superconducting fault current limiter (SFCL), was investigated. The hysteresis loss of iron core in flux-lock type SFCL does not happen due to its winding's structure especially in the normal state. From the equivalent circuit for the flux-lock type SFCL and the fault current limiting experiments, the hysteresis curves could be drawn. Through the hysteresis curves together with the fault current level due to the inductance ratio for the 1st and 2nd windings, the increase of the number of turns in the 2nd winding of the flux-lock type SFCL had a role to prevent the iron core from saturation.

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모델링 오차를 갖는 불확정 시스템에서의 견실한 이상 검출기 (A Robust Fault Detection method for Uncertain Systems with Modelling Errors)

  • 권오주;이명의
    • 대한전기학회논문지
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    • 제39권7호
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    • pp.729-739
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    • 1990
  • This paper deals with the fault detection problem in uncertain linear/non-linear systems having both undermodelling and noise. A robust fault detection method is presented which accounts for the effects of noise, model mismatch and nonlinearities. The basic idea is to embed the unmodelled dynamics in a stochastic process and to use the nominal model with a predetermined fixed denominator. This allows the input /output relationship to be represented as a linear function of the system parameters and also facilitate the quatification of the effect of noise, model mismatch and linearization errors on parameter estimation by the Bayesian method. Comparisons are made via simulations with traditional fault detection methods which do not account for model mismatch or linearization errors. The new method suggested in this paper is shown to have a marked improvement over traditional methods on a number of simulations, which is a consequence of the fact that the new method explicitly for the effects of undermodelling and linearization errors.

출력순자를 이용한 조합회로의 고장검출에 관한 연구 (A Study on the fault Detection using output Sequence in Combinational Logic Networks)

  • 한희;박규태
    • 대한전자공학회논문지
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    • 제17권4호
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    • pp.31-37
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    • 1980
  • 본 논문은 조합논리회로의 고장검출에 관한 것이다. 회로내의 각 line의 test set사이의 관계를 고찰하므로서 모든 test set을 D-algorithm을 반복하여 적용하지 않고 어느 하나의 test set 만을 구하여 이를 전파시켜서 구할 수 있는 방법을 연구하였고, 두번째로는 모든 선마다의 test set을 구하여 이를 회로에 모두 인가하여 고장을 검출하는 종래의 방법을 벗어나서 입력수만큼의 test set을 인가하여 출력의 상고를 점검하여 고장을 검출하는 방법을 제시되었다.

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공간자료구조를 활용한 단층인식 시스템 (Fault Detection System Using Spatial Index Structure)

  • 방갑산
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2005년도 추계종합학술대회
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    • pp.1205-1208
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    • 2005
  • By adding user interface to the usual router, an improved functional router is implemented in this paper. Due to the massive amount of spatial data processing, spatial information processing area has been rapidly grown up in recent years based on powerful computer hardware and software development. Spatial index structures are the core engine of geographic information system(GIS). Analyzing and processing of spatial information using GIS has a lot of applications and the number application will be increased in the future. However, study on the under ground is in its infancy due to invisible characteristic of this information. This paper proposes the sub-surface fault detection system using the sub-surface layer information gathered from elastic wave. Detection of sub-surface fault provides very important information to the safety of above and sub-surface man made structures. Development of sub-surface fault detection system will serve as a pre-processing system assisting the interpretation of the geologist.

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스트림 암호 A5/3에 대한 오류 주입 공격 (A Fault Injection Attack on Stream Cipher A5/3)

  • 정기태;이유섭;성재철;홍석희
    • 정보보호학회논문지
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    • 제22권1호
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    • pp.3-10
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    • 2012
  • 본 논문에서는 GSM에서 사용되는 스트림 암호 A5/3에 대한 오류 주입 공격을 제안한다. 이 공격의 오류 주입 가정은 FDTC'05와 CISC-W'10에서 제안된 오류 주입 공격에 기반을 둔다. 본 논문에서 제안하는 오류 주입 공격은 64/128-비트 세션키를 사용하는 A5/3에 모두 적용 가능하며, 적은 수의 오류 주입을 이용하여 세션키를 복구할 수 있다. 이 공격 결과는 A5/3에 대한 첫 번째 키 복구 공격 결과이다.

자기검사 Pulse별 잉여수연산회로를 이용한 고신뢰화 Fault Tolerant 디지털필터의 구성에 관한 연구 (Implementation of High Reliable Fault-Tolerant Digital Filter Using Self-Checking Pulse-Train Residue Arithmetic Circuits)

  • 김문수;손동인;전구제
    • 대한전자공학회논문지
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    • 제25권2호
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    • pp.204-210
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    • 1988
  • The residue number system offers the possibility of high-speed operation and error detection/correction because of the separability of arithmetic operations on each digit. A compact residue arithmetic module named the self-checking pulse-train residue arithmetic circuit is effectively employed as the basic module, and an efficient error detection/correction algorithm in which error detection is performed in each basic module and error correction is performed based on the parallelism of residue arithmetic is also employed. In this case, the error correcting circuit is imposed in series to non-redundant system. This design method has an advantage of compact hardware. Following the proposed method, a 2nd-order recursive fault-tolerant digital filter is practically implemented, and its fault-tolerant ability is proved by noise injection testing.

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RAM의 최소 테스트 패턴에 관한 연구 (A Study on the Minimal Test Pattern of the RAM)

  • 김철운;정우성;김태성
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1996년도 추계학술대회 논문집
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    • pp.23-25
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    • 1996
  • In this paper aims at studying the minimal test pattem of the RAM. This also propose a scheme of testing faults from the new fault model using the LLB. The length of test patterns are 6N(1-wsf), 9.5N(2-wsf), 7N(3-wsfl, 3N(4-wsf) operations in N-bit RAM. This test techniques can write into memory cell the number of write operations is reduced and then much testing time is saved. A test set which detects all positive-negative static t-ws faults for t=0, 1, 2, 3, 4 and detects all pattern sensitive fault in memory array. A new fault model, which encompasses the existing fault model Is proposed.

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Indirect Fault Detection Method for an Onboard Degaussing Coil System Exploiting Underwater Magnetic Signals

  • Jeung, Giwoo;Choi, Nak-Sun;Yang, Chang-Seob;Chung, Hyun-Ju;Kim, Dong-Hun
    • Journal of Magnetics
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    • 제19권1호
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    • pp.72-77
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    • 2014
  • This paper proposes an indirect fault detection method for an onboard degaussing coil system, installed to reduce the underwater magnetic field from the ferromagnetic hull. The method utilizes underwater field signals measured at specific magnetic treatment facilities instead of using time-consuming numerical field solutions in a three-dimensional space. An equivalent magnetic charge model combined with a material sensitivity formula is adopted to predict fault coil locations. The purpose of the proposed method is to yield reliable data on the location and type of a coil breakdown even without information on individual degaussing coils, such as dimension, location and number of turns. Under several fault conditions, the method is tested with a model ship equipped with 20 degaussing coils.