• 마이크로전자및패키징학회지
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• 제20권3호
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• pp.31-35
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• 2013

TSOP(Thin Small Outline Package)는 가전제품, 자동차, 모바일, 데스크톱 PC등을 위한 저렴한 비용의 패키지로, 리드 프레임을 사용하는 IC패키지이다. TSOP는 BGA와 flip-chip CSP에 비해 우수한 성능은 아니지만, 저렴한 가격 때문에 많은 분야에 널리 사용되고 있습니다. 그러나, TSOP 패키지에서 몰딩공정 할 때 리드프레임의 열적 처짐 현상이 빈번하게 일어나고, 반도체 다이와 패드 사이의 Au 와이어 떨어짐 현상이 이슈가 되고 있다. 이러한 문제점을 해결하기 위해서는 리드프레임의 구조를 개선하고 낮은 CTE를 갖는 재료로 대체해야 한다. 본 연구에서는 열적 안정성을 갖도록 리드프레임 구조 개선을 위해 수치해석적 방법으로 진행하였다. TSOP 패키지에서 리드프레임의 열적 처짐은 반도체와 다이 사이의 거리(198 um~366 um)에서 안티-디플렉션의 위치에 따라 시뮬레이션을 진행하였다. 안티-디플렉션으로 TSOP 패키지의 열적 처짐은 확실히 개선되는 것을 확인 했다. 안티-디플렉션의 위치가 inside(198 um)일 때 30.738 um 처짐을 보였다. 이러한 결과는 리드프레임의 열적 팽창을 제한하는데 안티-디플렉션이 기여하고 있기 때문이다. 그러므로 리드프레임 패키지에 안티-디플렉션을 적용하게 되면 낮은 CTE를 갖는 재료로 대체하지 않아도 열적 처짐을 향상시킬 수 있음을 기대할 수 있다.

• Journal of Welding and Joining
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• 제17권1호
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• pp.124-132
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• 1999

Thermal fatigue strength of the solder joints is the most critical issue for TSOP(Thin Small Outline Package) because the leads of this package are extremely short and thermal deformation cannot be absorbed by the deflection of the lead. And the TSOP body can be subject to early fatigue failures in thermal cycle environments. This paper was discussed distribution of thermal stresses at near the joint between silicon chip and die pad and investigated their reliability of solder joints of TSOP with 42 alloy clad lead frame on printed circuit board through FEM and 3 different thermal cycling tests. It has been found that the stress concentration around the encapsulated edge structure for internal crack between the silicon chip and Cu alloy die pad. And using 42 alloy clad, The reliability of TSOP body was improved. In case of using 42 alloy clad die pad(t=0.03mm). $$\sigma$_{VMmax}$ is 69Mpa. It is showed that 15% improvement of the strength in the TSOP body in comparison with using Cu alloy die pad $($\sigma$_{VMmax}$=81MPa). In solder joint of TSOP, the maximum equivalent plastic strain and Von Mises stress concentrate on the heel of solder fillet and crack was initiated in it's region and propagated through the interface between lead and solder. Finally, the modified Manson-Coffin equation and relationship of the ratio of $N_{f}$ to nest(η) and cumulative fracture probability(f) with respect to the deviations of the 50% fracture probability life $(N_{f 50%})$ were achieved.

• 전자공학회논문지D
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• 제35D권4호
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• pp.61-70
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• 1998

The electrical performance of a package is extremely important for high speed digital system operations. CSP(chip scale package) is known to have better electrical performance than the convnetional packages. In this paper, the electrical performance of the BLP(bottom leaded plastic) package, a kind of CSP, has been alayzed by both simulation and real measurement. The electrical perfdormance of a BLP was compared with that of the conventioanl TSOP(thin small outline package). The leadinductanceand lead capacitance were used for the comparison purposes. The new BLP design provides much better electrical performance that TSOP package. It has about 40% favorable parameter values.

• 마이크로전자및패키징학회지
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• 제23권4호
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• pp.49-55
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• 2016

Nowadays there are magnetic sensors in a wide variety of equipment such as computers, cars, airplanes, medical and industrial instruments. In many of these applications the magnetic sensors offer safe and non-invasive means of detection and are more reliable than other technologies. The electric current in a conductor generates a magnetic field detected by this type of sensor. This work aims to define a package dedicated to an electrical current sensor using a MTJ (Magnetic Tunnel Junction) as a sensing device. Four different proposals of packaging, three variations of the chip on board (CoB) package type and one variation of the thin small outline package (TSOP) were analyzed by COMSOL modeling software by simulating a brad range of current injection. The results obtained from the thermal and magnetic analysis has proven to be very important for package improvements, specially for heat dissipation performance.

• Journal of Welding and Joining
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• 제13권2호
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• pp.82-95
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• 1995

This paper discusses distribution of thermal stress, strain at near the joint and investigates the reliability of solder joints of electronic devices on a printed circuit board. As Electronic devices are composed of different materials, thermal stresses generate at near the interface, such as solder joints and interface between lC device and lead frame pad due to the differences of thermal expansion coefficients, As results of thermal stress, strain, micro crack often occurs thermal fatigue fracture at the interface of different materials, The initiation and propagation of micro crack depend on the environmental conditions, such as storage temperature and thermal cycling. Finally, this paper experimentally shows a way to suppress micro cracks by using Fe-Ni alloy clad lead frame, and investigates crack and thermal fatigue fracture of TSOP(Thin small outline package) type on printed circuit board.