• Title/Summary/Keyword: TLM 분석

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Contact property analysis of ITO - n type emitter, ITO - Ag by TLM (TLM 분석법을 통한 ITO - n emitter간, ITO - Ag 간 접촉 저항 특성 분석)

  • Ryu, Kyungyul;Beak, Kyunghyun;YiKim, Junsin
    • 한국신재생에너지학회:학술대회논문집
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    • 2010.11a
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    • pp.50.2-50.2
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    • 2010
  • Indium Tin Oxide (ITO)는 투과도가 높고, 전기 전도도가 뛰어나 TFT, 태양전지 등 여러 가지 산업에서 전극의 재료로 널리 사용되고 있다. 전극의 재료로써 가장 중요하게 고려되어야 할 사항 중의 하나는 전극과 접촉하는 물질과의 접촉 저항이다. 특히, 태양전지에서 높은 접촉 저항은 셀을 직렬저항 요소를 증가시켜 태양전지의 효율 저하를 가져 온다. 본 연구에서는 ITO를 실리콘 태양전지에 적용하기 위하여, ITO - n-type emitter간, ITO - Ag 간의 접촉 특성을 Transfer Length Method(TLM)을 통하여 분석하였다. p-type 실리콘의 전면을 도핑하여 pn접합을 형성한 후, 그 위에 ITO 패턴을 형성하여 ITO-emitter 간의 접촉 특성을 측정하였고, 두껍게 증착한 SiNx 박막 전면에 ITO를 증착한 후, Ag 패턴을 형성하여 ITO-Ag간의 접촉 특성을 측정 하였다. 측정 결과, ITO와 emitter 간의 접촉 비저항은 $0.9{\Omega}-cm^2 $을 나타내었고, ITO와 Ag와의 접촉 비저항은 $0.096{\Omega}-cm^2 $을 나타내었다.

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Near-field Performance Analysis of LW-TLM Antenna for propagation obstacle (장파대역 TLM 안테나의 전파 장애물에 의한 근거리장 성능 분석)

  • Kim, Young-Wan
    • Journal of IKEEE
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    • v.24 no.4
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    • pp.1064-1068
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    • 2020
  • For LW-TLM antenna of 65 kHz, Near-field propagation characteristics due to wave propagation obstacle are analyzed in this paper. The simulation modeling for propagation effects are based on the model of actual LW-TLM antenna which utilizes the frequency of 65 kHz, and the model expressed as propagation obstacle at a mountain height and a proximity of antenna and mountain. The near-field performance are analyzed based on the parameters of simulation model. In case of a normal mountain height and distance between the adjacent mountain and antenna site, a field strength change of about 1.7 dB has occurred. Above the constant distance of propagation obstacle and antenna, the wave propagation characteristics of disregarding the effects of propagation obstacle are shown. The results of this paper can be used to design and build a transmitting antenna site with 65 kHz operating frequency.

Characteristic comparison of various arbitration policies using TLM method (TLM 방법을 이용한 다양한 중재 방식의 특성 비교)

  • Lee, Kook-Pyo;Koh, Si-Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.8
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    • pp.1653-1658
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    • 2009
  • SoC(System on a Chip) has several masters, slaves, arbiter and decoder in bus architecture. Master initiates the data transactions like CPU, DMA and DSP and slave responses the data transactions like SRAM, SDRAM and register. Furthermore, as multiple masters can't use a bus concurrently, arbiter plays an role in bus arbitration. In compliance with the selection of arbitration method, SoC performance can be changed definitely. In this study, we compare the characteristics of various arbitration policies using TLM(Transaction Level Model) method. Fixed priority, round-robin, TDMA and Lottery bus policies are used in general arbitration method. We analyze the merit and demerit of these arbitration policies.

The Hybrid Bus arbitration policy (하이브리드 버스 중재 방식)

  • Lee, Kook-Pyo;Yoon, Yung-Sup
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.50-56
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    • 2009
  • SoC(System on a Chip) has several masters, slaves, arbiter and decoder in bus architecture. Master initiates the data transactions like CPU, DMA and DSP and slave responses the data transactions like SRAM SDRAM and register. Furthermore, as multiple masters can't use a bus concurrently, arbiter plays an role in bus arbitration. In compliance with the selection of arbitration method, SoC performance can be changed definitely. Fixed priority, round-robin, TDM arbitration are used in general arbitration method, In this study, we compose TLM algorithm and analyze general arbitration methods through TLM simulation. Consequently, we propose the hybrid bus arbitration policy and verify the performance, compared with the other arbitration methods.

The association between body composition and bone mineral density in subjects aged 50 years or older in men and postmenopausal women in Korea

  • Cho, Jeong-Ran
    • Journal of the Korea Society of Computer and Information
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    • v.26 no.8
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    • pp.209-220
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    • 2021
  • The effect of body composition such as lean mass and fat mass on bone mineral density (BMD) is complex and still controversial. In this study, we investigated the relationship between body composition and bone mineral density using nation-wide data from 2008 to 2011 Korea National Health and Nutrition Examination Survey (KNHANES) in 2,139 men and 2,193 postmenopausal women aged 50 years or older. Subjects with history of medication for osteoporosis or with diseases or malignancy affecting bone metabolism were excluded. Data of anthropometric measurements and demographic characteristics were collected by trained examiner. Fasting blood sample was obtained for blood chemistry analysis. BMD of the lumbar spine, total femur, and femoral neck, and body composition such as total lean mass (TLM), total fat mass (TFM), truncal fat mass (TrFM) were measured using dual-energy X-ray absorptiometry (DXA). There were significant positive correlations between body composition indices such as lean mass and fat mass with BMD. In multiple regression analysis, TLM was positively associated with BMD after adjusting age, body mass index, monthly house income, education level, physical activity, daily calcium intake and vitamin D concentration in both men and postmenopausal women. BMD at lumbar spine and femur in lowest quartile of TLM was significantly lower than other quartiles after adjusting those confounding factors in both gender. TrFM was negatively associated with total femur BMD in male and femur neck BMD in postmenopausal women after adjusting confounding factors. In conclusion, TLM is very important factor in maintaining BMD in subjects aged 50 years or older in men and postmenopausal women.

Performance Analysis of TLM in Flying Master Bus Architecture Due To Various Bus Arbitration Policies (다양한 버스 중재방식에 따른 플라잉 마스터 버스아키텍처의 TLM 성능분석)

  • Lee, Kook-Pyo;Yoon, Yung-Sup
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.45 no.5
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    • pp.1-7
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    • 2008
  • The general bus architecture consists of masters, slaves, arbiter, decoder and so on in shared bus. Specially, as several masters do not concurrently receive the right of bus usage, the arbiter plays an important role in arbitrating between shared bus and masters. Fixed priority, round-robin, TDMA and Lottery methods are developed in general arbitration policies, which lead the efficiency of bus usage in shared bus. On the other hand, the bus architecture can be modified to maximize the system performance. In the paper, we propose the flying master bus architecture that supports the parallel bus communication and analyze its merits and demerits following various arbitration policies that are mentioned above, compared with normal shared bus. From the results of performance verification using TLM(Transaction Level Model), we find that more than 40% of the data communication performance improves, regardless of arbitration policies. As the flying master bus architecture advances its studies and applies various SoCs, it becomes the leading candidate of the high performance bus architecture.

Reactive Magnetron Sputtering 법을 이용한 SnO 투명산화물반도체 합성 및 특성분석

  • Lee, Seung-Hui;Kim, Jeong-Ju;Heo, Yeong-U;Lee, Jun-Hyeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.265.1-265.1
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    • 2016
  • 여러 application에 적용하기 위하여 p-type SnO 박막과 전극 간의 접촉 저항을 분석이 필요하였다. 이를 Transmission Line Method(TLM) 패턴 소자를 제작한 후 전기적 특성을 분석함으로써 알 수 있었다. $Si/SiO_2$ 기판에 Reactive Magnetron Sputtering법을 이용하여 c축 우선 배향된 SnO를 100nm 증착하고 photolithography 공정을 통해 전극을 패턴화하여 100nm 두께로 증착하였다. 전극 간 거리는 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, $1024{\mu}m$로 각각 2배씩 증가하는 패턴이고 폭 W는 $300{\mu}m$ 이다. p-type SnO 의 경우, work function이 4.8eV이기 때문에 전극과 ohmic contact이 되기 위해서는 4.8eV보다 높은 work function 값을 가지는 전극이 필요하였다. 이 조건과 맞는 후보로 Ni(5.15eV), ITO(5.3eV)를 설정한 후 소자를 제작하였다. 제작된 소자는 열처리 하지 않은 소자와 Rapid Thermal Annealing(RTA) 장비에서 $100^{\circ}C$, $200^{\circ}C$, $300^{\circ}C$에서 각각 1분씩 열처리한 소자의 특성을 분석하였다. 열처리 하지 않은 소자의 경우 Ni 전극의 specific contact resistance는 $3.42E-2{\Omega}$의 값을 나타내었고, ITO의 경우 $3.62E-2{\Omega}$값을 나타내었다.

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Modeling of the Power/Ground Plane Noise Including Dielectric Substrate Loss (유전체 손실을 고려한 전원부에서 유기되는 노이즈 모델링에 관한 연구)

  • Kim, Jong-Min;Nam, Ki-Hoon;Ha, Jung-Rae;Song, Ki-Jae;Na, Wan-Soo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.2
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    • pp.170-178
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    • 2010
  • In this paper, we propose the modeling of the power/ground plane which includes complex dielectric permittivity and loss tangent for the power/ground coupled noise. In order to estimate the effects of the dielectric substrate for the coupled noise, we used full-wave simulators, HFSS(High Frequency Structure Simulation) and MWS(MicroWave Studio). The simulated results for the commercial substrates are compared with the measured values. TLM(Transmission Line Method) was used for the calculation of power plane impedance using Debye model which depicts the dielectric loss of PCB. Finally, impedance from proposed circuit model showed very good coincidence to the measured data.

Ti Source/Drain 전극 접합 특성이 InGaZnO 기반 박막형 트랜지스터 특성에 미치는 영향 연구

  • Choe, Gwang-Hyeok;Kim, Han-Gi
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.310-310
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    • 2013
  • 본 연구에서는 Titanium (Ti) source/drain 전극 접합이 차세대 비정질 InGaZnO (IGZO) 기반 박막형 트랜지스터에 미치는 영향을 화학적, 구조적, 전기적 특성 분석을 통하여 관찰하고 Ti/IGZO 접합 특성을 설명할 수 있는 메커니즘을 제시하였다. IGZO 기반 박막형 트랜지스터 소자의 구동 특성은 transmission line method (TLM) 패턴 공정을 이용하여 정량적으로 분석되었다. 비정질 IGZO 기반의 박막형 트랜지스터에서 Ti source/drain 전극 접합에 의한 구동 특성 변화 및 영향을 확인하기 위하여 금속/산화물 계면 반응성이 낮은 silver (Ag) source/drain 전극이 reference로 비교되었으며, 그 결과 Ti source/drain 전극 접합이 적용된 비정질 IGZO 트랜지스터의 경우 Ti 금속과 IGZO 산화물 계면에 형성되는 열역학적으로 안정한 $TiO_x$ 층의 형성에 의해 VT ($-{\Delta}0.52V$) shift 및 saturation mobility ($8.48cm^2$/Vs) 상승됨을 확인하였다. 뿐만 아니라 TLM 패턴을 이용한 IGZO 트랜지스터의 전기적 변수 도출 및 수치적 해석으로부터 $TiO_x$ 계면층 형성이 Ti 금속과 비정질 InGaZnO 계면에서의 effective contact resistivity를 효과적으로 낮출 수 있음을 확인하였다. Ti source/drain 전극 접합에 의해 발생되는 $TiO_x$ 계면층의 화학적, 구조적 특성과 $TiO_x$ 계면층 생성에 의한 소자 특성 변화를 연관시켜 해석함으로써, IGZO 기반 박막형 트랜지스터에서의 Ti source/drain 전극 접합이 비정질 IGZO 기반 박막형 트랜지스터에 미치는 영향을 설명하였다.

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A Transaction Level Simulator for Performance Analysis of Solid-State Disk (SSD) in PC Environment (PC향 SSD의 성능 분석을 위한 트랜잭션 수준 시뮬레이터)

  • Kim, Dong;Bang, Kwan-Hu;Ha, Seung-Hwan;Chung, Sung-Woo;Chung, Eui-Young
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.12
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    • pp.57-64
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    • 2008
  • In this paper, we propose a system-level simulator for the performance analysis of a Solid-State Disk (SSD) in PC environment by using TLM (Transaction Level Modeling) method. Our method provides quantitative analysis for a variety of architectural choices of PC system as well as SSD. Also, it drastically reduces the analysis time compared to the conventional RTL (Register Transfer Level) modeling method. To show the effectiveness of the proposed simulator, we performed several explorations of PC architecture as well as SSD. More specifically, we measured the performance impact of the hit rate of a cache buffer which temporarily stores the data from PC. Also, we analyzed the performance variation of SSD for various NAND Flash memories which show different response time with our simulator. These experimental results show that our simulator can be effectively utilized for the architecture exploration of SSD as well as PC.