• Title/Summary/Keyword: TLB

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An Study on the Improved Modeling and Double Loop Controller Design for Three-Level Boost Converter (Three-Level Boost Converter의 개선된 모델링 및 더블 루프 제어기 설계에 관한 연구)

  • Lee, Kyu-Min;Kim, Il-Song
    • The Transactions of the Korean Institute of Power Electronics
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    • v.25 no.6
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    • pp.442-450
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    • 2020
  • A small-signal modeling approach for a three-level boost (TLB) converter and a design methodology for a double-loop controller are proposed in this study. Conventional modeling of TLB converters involves three state variables. Moreover, TLB converters have two operation modes depending on the duty ratio. Consequently, complex mathematical calculations are required for controller design. This study proposes a simple system modeling method that uses two state variables, unlike previous methods that require three state variables. Analysis shows that the transfer functions of the two operation modes can be expressed as identical equations. This condition means that the linear feedback controller can be applied to all operational ranges, that is, for full duty ratios. The design method for a double-loop controller using a PI controller is presented in step-by-step sequences. Simulation and experimental verifications are conducted to verify the effectiveness of the small-signal analysis and control system design.

A Combined BTB Architecture for effective branch prediction (효율적인 분기 예측을 위한 공유 구조의 BTB)

  • Lee Yong-hwan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.7
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    • pp.1497-1501
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    • 2005
  • Branch instructions which make the sequential instruction flow changed cause pipeline stalls in microprocessor. The pipeline hazard due to branch instructions are the most serious problem that degrades the performance of microprocessors. Branch target buffer predicts whether a branch will be taken or not and supplies the address of the next instruction on the basis of that prediction. If the hanch target buffer predicts correctly, the instruction flow will not be stalled. This leads to the better performance of microprocessor. In this paper, the architecture of a ta8 memory that branch target buffer and TLB can share is presented. Because the two tag memories used for branch target buffer and TLB each is replaced by single combined tag memory, we can expect the smaller chip size and the faster prediction. This shared tag architecture is more advantageous for the microprocessors that uses more bits of address and exploits much more instruction level parallelism.

Effect of higher modes and multi-directional seismic excitations on power plant liquid storage pools

  • Eswaran, M.;Reddy, G.R.;Singh, R.K.
    • Earthquakes and Structures
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    • v.8 no.3
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    • pp.779-799
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    • 2015
  • The slosh height and the possibility of water spill from rectangular Spent Fuel Storage Bays (SFSB) and Tray Loading Bays (TLB) of Nuclear power plant (NPP) are studied during 0.2 g, Safe Shutdown Earthquake (SSE) level of earthquake. The slosh height obtained through Computational Fluid dynamics (CFD) is compared the values given by TID-7024 (Housner 1963) and American concrete institute (ACI) seismic codes. An equivalent amplitude method is used to compute the slosh height through CFD. Numerically computed slosh height for first mode of vibration is found to be in agreement the codal values. The combined effect in longitudinal and lateral directions are studied separately, and found that the slosh height is increased by 24.3% and 38.9% along length and width directions respectively. There is no liquid spillage under SSE level of earthquake data in SFSB and TLB at convective level and at free surface acceleration data. Since seismic design codes do not have guidelines for combined excitations and effect of higher modes for irregular geometries, this CFD procedure can be opted for any geometries to study effect of higher modes and combined three directional excitations.

Surgical Lung Biopsy for Diffuse Infiltrative Lung Disease (미만성 침윤성 폐질환의 외과적 폐생검)

  • Lee, Jang-Hoon;Kwon, Jin-Tae;Lee, Jung-Cheul
    • Journal of Chest Surgery
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    • v.39 no.11 s.268
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    • pp.844-849
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    • 2006
  • Background: The diffuse infiltrative lung disease requires surgical lung biopsy for its final diagnosis. We evaluated the effect of surgical lung biopsy for final diagnosis of duffuse interstitial lung disease and compared video assisted thoracoscopic lung biopsy(TLB) with open lung biopsy(OLB). Material and Method: We evaluated the patients who underwent surgical lung biopsy from March 2000 from December 2005, retrospectively, We divide to two groups(OLB and TLB group) and compared them. Result: There were 36 patients and cough was the most common pre- operative symptom. Surgery time, anesthetic time, hospital stay, duration of chest tube indwelling, specimen volume and the rate of post-operative complication were not significantly different between two groups. Histologic diagnosis was confirmed in all cases. There was one post-operative death who had suffered from respiratory failure since pre-operative period. Conclusion: Surgical lung biopsy is effective method in final diagnosis for diffuse infiltrative lung disease. Video assisted thoracoscopic lung biopsy is lesser invasive method than open lung biopsy and provide similar results, so it is basic diagnostic method of surgical lung biopsy.

Effect of Microkernel Structure on Cache Memory Performance (마이크로커널 구조가 캐시 메모리의 성능에 미치는 영향)

  • Chang, Moon-Seok;Koh, Kern
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.1
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    • pp.68-80
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    • 2000
  • The modern software technology toward modularization has changed the cache accessing behavior dramatically. Many modern operating systems are also departing from the past monolithic structure toward the highly modularized structure referred to as microkernel. Microkernel-based operating systems are more portable and extensible, but are likely to have worse performance. This paper quantitatively analyzes the effect of microkernel structure on cache memory to identify the primary factor for its performance degradation. Through the experiment performed on a Intel Pentium Pro processor platform, we found that the microkernel structure suffers from remarkably higher misses for L1, L2 cache and TLB than the monolithic one does. We also found that the performance of a microkernel is more dependent on the efficiency of cache memory than IPC. Finally, we found that these results come from the effect of frequent context switches mainly caused by the structural feature of a microkernel.

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Impact Analysis for Page Size of Desktop and Smartphone Environments under Fast Storage Media (고속 스토리지 탑재에 따른 데스크탑과 스마트폰 환경의 페이지 크기 영향력 분석)

  • Park, Yunjoo;Bahn, Hyokyung
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.22 no.2
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    • pp.77-82
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    • 2022
  • Due to the recent advent of fast storage media, the memory management system needs to reconsider the configuring of a page unit. In this paper, we analyze the effect of the page size on memory performance as fast storage is adopted. Specifically, we analyze the TLB hit ratio and the page fault ratio as the workload and the page size are varied in desktop and smartphone environments. Our analysis shows that the influence of the page size depends on the system and workload conditions in desktop systems. However, in smartphone systems, the effect of the page size on memory performance is not large, and is not also sensitive to workloads. We expect that the analysis of this paper will be helpful in configuring the page size of given workloads under the system with fast storage media.

Comparison of an Uncut Roux-en-Y Gastrojejunostomy with a Billroth I Gastroduodenostomy after Totally Laproscopic Distal Gastrectomy (전복강경하 원위부 위절제술 후 Uncut Roux-en-Y 위공장문합술과 B-I 위십이지장문합술의 비교)

  • Kim, Jin-Jo;Kim, Sung-Keun;Jun, Kyong-Hwa;Kang, Han-Chul;Song, Kyo-Young;Chin, Hyung-Min;Kim, Wook;Jeon, Hae-Myung;Park, Cho-Hyun;Park, Seung-Man;Lim, Keun-Woo;Park, Woo-Bae;Kim, Seung-Nam
    • Journal of Gastric Cancer
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    • v.7 no.3
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    • pp.139-145
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    • 2007
  • Purpose: An uncut Roux-en-Y gastrojejunostomy has been known to be effective in preventing bile reflux gastritis in the remnant stomach and the Roux stasis syndrome. Materials and Methods: To evaluate the usefulness of a totally laparoscopic uncut Roux-en-Y gastrojejunostomy (TLuRYGJ) after a distal gastrectomy, we reviewed the medical records of 19 consecutive patients that underwent a TLuRYGJ at our institution, and 11 consecutive patients who underwent a totally laparoscopic Billroth I gastrectomy (TLB-I) during the same period. Results: Postoperative gastrointestinal symptoms related to the postgastrectomy syndrome and the Visick classification at six months after surgery were not different in the two groups; however, there was no case of symptomatic bile reflux gastritis and only one case of delayed gastric empting, for which medication was required, in the TLuRYGJ group. The endoscopic findings of the remnant stomach for bile reflux gastritis at six months after surgery were better in the TLuRYGJ group than in the TLB-I group. Conclusion: A TLuRYGJ was found to be effective in preventing bile reflux gastritis and the Roux stasis syndrome.

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Analysis of Parallel-Input Series-Output(PISO) Boost Converter With Output Voltage Balancing Characteristic (병렬입력/직렬출력(PISO) 부스트 컨버터의 출력 전압 밸런싱 특성 해석)

  • Nam, Hyun-Taek;Cha, Honnyong;Kim, Heung-Geun
    • The Transactions of the Korean Institute of Power Electronics
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    • v.23 no.1
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    • pp.40-46
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    • 2018
  • In this study, the output voltage balancing characteristics of parallel-input series-output (PISO) boost converter is analyzed. The PISO boost converter is derived by combining two basic boost converters. In comparison with the conventional three-level boost converter, the PISO boost converter can balance the output voltages under an unbalanced load condition without requiring additional circuit components and control strategy. A 2 kW prototype converter is built and tested to verify the output voltage balancing characteristics of the PISO boost converter.

Design and Implementation of IPC Component in M3K (M3K에서 IPC 컴포넌트 설계 및 구현)

  • Kim, Young-Ho;Ko, Young-Woong;Yoo, Chuck
    • Proceedings of the Korean Information Science Society Conference
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    • 2000.10c
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    • pp.35-37
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    • 2000
  • M3K(MutiMedia MicroKernel)는 멀티미디어에서 요구하는 실시간 특성을 지원할 수 있는 것을 목표로 하고 있으며, 이를 위해서 마이크로 커널 구조로서 설계되었다. 마이크로 커널은 내부에서 발생하는 지연시간이 작고 예측 가능하므로 실시간 시스템을 지원하기에 적합하다. 그러나 서버간의 빈번한 메시지 교환에 따른 IPC 병목현상은 전체 시스템의 성능을 저하시키고, 외부 이벤트에 대한 실시간 처리를 어렵게 한다. 본 연구에서는 M3K 에서 실시간 특성을 지원할 수 있도록 IPC를 설계 및 구현하는 것을 목표로 하고 있다. 이에 대한 접근방법으로는 IPC 중에 발생되는 쓰레드 간의 문맥 전환을 소프트웨어적으로 구현하고, IPC를 우선 순위가 부여된 시그널 객체를 이용하여 처리하고 있다. 따라서 빈번하게 발생되는 문맥 전환의 비용을 최소화함으로써 캐쉬 미스 및 TLB 미스를 줄이고, 우선 순위가 높은 이벤트나 IPC부터 처리될 수 있게 한다.

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A Clustered Flash Translation Layer for Mobile Storage Systems (휴대용 저장장치 시스템을 위한 Clustered Flash Translation Layer)

  • Park, Kwang-Hee;Kim, Deok-Hwan
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.3
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    • pp.94-100
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    • 2008
  • It is necessary to develop the flash memory system software FTL(Flash Translation Layer) which is used in mobile storage like Compact Flash memory. In this paper, we design the FTL using clustered hash table and two phase software caching method to translate logical address into physical address fastly. The experimental results show that the address translation performance of CFTL is 13.3% higher than that of NFTL and 8% higher than that of AFTL, and the memory usage of CFTL is 75% smaller than that of AFTL.