• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.81-88
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• 2006

This paper describes a new linear operational transconductance amplifier (OTA). To improve the linearity of the OTA, we employ a mobility compensation circuit that combines the transistor paths operating at the triode and subthreshold regions. The common-mode control schemes consist of a common-mode feedback (CMFB) and common-mode feedforward (CMFF). The circuit enhances linearity of the transconductance (Gm) under the wide input voltage swing range. The proposed OTA shows ${\pm}1%$ Gm variation and the total harmonic distortion (THD) of below -73dB under the input voltage swing range of ${\pm}1.1V$. The OTA is implemented using a $0.35{\mu}m$ n-well CMOS process under 3.3V supply.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.4
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• pp.28-34
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• 2000

In this paper, a continuous-time filter for low voltage and high frequency applications using fully-balanced current integrators is presented. As the balanced structure of integrator circuits, the designed filter has improved noise characteristics and wide dynamic range since even-order harmonics are cancelled and the input signal range is doubled. Using complementary current mirrors, bias circuits are simplified and the cutoff frequency of filters can be controlled easily by a single DC bias current. As a design example, the 3rd-order lowpass Butterworth filter with a leapfrog realization is designed. The designed fully-balanced current-mode filter is simulated and examined by SPICE using 0.65${\mu}{\textrm}{m}$ CMOS n-well process parameters. The simulation results show 50MHz cutoff frequency, 69㏈ dynamic range with 1% total harmonic distortion(THD), and 4㎽ power dissipation with a 3V supply voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.12
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• pp.46-53
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• 2003

This paper describes a new linear operational transconductance amplifier (OTA) and its application to the 9th-order Bessel filter. To improve the linearity of the OTA, we employ a mobility compensation technique. The combination of the triode and the subthreshold region transistors can compensate the mobility reduction effect and make the OTA with a good linearity. The proposed OTA shows $\pm$0.32% Gm variation over the input range of $\pm$0.8-V. The total harmonic distortion (THD) was lower than -60-㏈. The 9th-order Bessel filter has been designed using a 0.35-${\mu}{\textrm}{m}$ n-well CMOS process under 3.3-V supply voltage. It shows the cutoff frequency of 8-MHz and the power consumption of 65-mW.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.44-53
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• 2008

In this paper, we present the design of delta-sigma modulation-based class-D amplifier for driving headphones in portable audio applications. The presented class-D amplifier generates PWM(pulse width modulation) signals using a single-bit fourth-order high-performance delta-sigma modulator. To achieve a high SNR(signal-to-noise ratio) and ensure system stability, the locations of the modulator loop filter poles and zeros are optimized and thoroughly simulated. The test chip is fabricated using a standard $0.18{\mu}m$ CMOS process. The active area of the chip is $1.6mm^2$. It operates for the signal bandwidth from 20Hz to 20kHz. The measured THD+N(total harmonic distortion plus noise) at the $32{\Omega}$ load terminal is less than 0.03% from a 3V power supply.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.4
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• pp.309-315
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• 2010

A fully-differential low-voltage low-power electrocardiogram (ECG) amplifier by using the nonfeedback PMOS pseudo-resistors is proposed. It consists of two operational-transconductance amplifiers (OTA) in series (a preamplifier and a variable-gain amplifier). To make it insensitive to the gate leakage current of the OTA input transistor, the feedback pseudo-resistor of the conventional ECG amplifier is moved to input branch between the OP amp summing node and the DC reference voltage. Also, an OTA circuit with a Gm boosting block without reducing the output resistance (Ro) is proposed to maximize the OTA DC gain. The measurements shows the frequency bandwidth from 7 Hz to 480 Hz, the midband gain programmable from 48.7 dB to 59.5 dB, the total harmonic distortion (THD) less than 1.21% with a full voltage swing, and the power consumption of 233 nW in a 0.13 ${\mu}m$ CMOS process at the supply voltage of 0.7 V.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.205-208
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• 2000

In this paper, a low voltage CMOS analog four-quadrant multiplier using two V-I converters is presented. The proposed V-I converter is composed of the series composite transistor and the low voltage composite transistor. The designed analog four-quadrant multiplier has simulated by HSPICE using 0.25$\mu\textrm{m}$ n-well CMOS process parameters with a 2V supply voltage. Simulation results show that the power dissipation is 1.55㎿, the cutoff frequency is 489MHz, and the THD can be 0.26％ at maximum differential input of 1V$\sub$p-p/.

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.1
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• pp.82-90
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• 1999

A pulse frequency control method for single-switch three-phase buck rectifiers is comprehensively studied in this paper. The proposed pulse frequency control method leads the three-phase buck rectifier to a high performance system that can draw the nearly sinusoidal input-line currents. The simulated and experimental results demonstrate that the system provides low total harmonic distortion of the input-line currents, high-power factor, and good output voltage regulation against load change.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2013.06a
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• pp.151-154
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• 2013

본 논문에서는 전관방송 시스템에 사용되는 전관방송용 파워앰프에 대해 TTA에서 개발한 시험규격을 설명하고, 주요 시험항목에 대해 출력 레벨에 따라 어떠한 특성이 나타나는지 시험 결과를 분석하였다. 시험을 위해 현재 상용으로 판매되는 정격출력이 260 W, 360 W, 480 W, 600 W 인 앰프를 사용하였고, 각각의 앰프에 대해 정격출력, 1/2 정격, 1/4 정격, 1/8 정격, 10W, 1W 일 때 주파수 응답, 신호대잡음비, THD+N 비를 측정하여 비교하였다. 향후 본 논문의 시험 데이타가 전관방송용 앰프의 성능을 가늠할 때 중요 지표가 될 것으로 기대한다.

• Proceedings of the KIEE Conference
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• 2006.07a
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• pp.147-148
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• 2006

Recently, due to increasing the application of power electronic equipment, harmonics generated from the non-liner load are fairly produced. Harmonics can cause a variety of problems such as the overheating of distribution transformer, the breakdown of device and communication interference. Interest about power quality decline of power system is very increased. In this paper, we are measured the harmonic voltage and current o( power system to analyze harmonic characteristics, and it is analyzed Total Harmonic Distortion(THD). Also, we Ere modeled power system using PSCAD/EMTDC. And it is analyzed harmonic voltage and current in steady-state. The study results have been indicated the utility about harmonics analysis and modelling for power system.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.251-254
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• 1999

In this paper V-I(Voltage to Current) converter using the series composite transistor is presented. Due to the series composite transistor employs operating in the saturation region and triode region, the proposed circuit has wide input range at low voltage. The designed V-I converter has simulated by HSPICE using 0.6${\mu}{\textrm}{m}$ n-well CMOS process with a $\pm$2.5V supply voltage. Simulation results show that the THD can be 0.81% at 4 $V_{p-p}$ differential input voltage when frequency of input signal is 10MHz.z.