• Title/Summary/Keyword: TFT (thin-film transistor)

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Characterization of Solution-Processed Oxide Transistor with Embedded Electron Transport Buffer Layer (전자 수송층을 삽입한 용액 공정형 산화물 트랜지스터의 특성 평가)

  • Kim, Han-Sang;Kim, Sung-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.8
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    • pp.491-495
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    • 2017
  • We investigated solution-processed indium-zinc oxide (IZO) thin-film transistors (TFTs) by inserting a 2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole (PBD) buffer layer. This buffer layer efficiently tuned the energy level between the semiconducting oxide channel and metal electrode by increasing charge extraction, thereby enhancing the overall device performance: the IZO TFT with embedded PBD layer (thickness: 5 nm; width: $2,000{\mu}m$; length: $200{\mu}m$) exhibited a field-effect mobility of $1.31cm^2V^{-1}s^{-1}$, threshold voltage of 0.12 V, subthreshold swing of $0.87V\;decade^{-1}$, and on/off current ratio of $9.28{\times}10^5$.

Study on the Electrical Stability of poly-Si TFT through the Passivation Treatment with $NH_3$ or $N_2$ Precursors ($NH_3$$N_2$ 활성기 처리를 통한 Poly-SiliconTFT의 전기적 안정도에 관한 연구)

  • Jun, J.H.;Choi, H.S.;Park, C.M.;Choi, K.Y.;Han, M.K.
    • Proceedings of the KIEE Conference
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    • 1996.07c
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    • pp.1443-1445
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    • 1996
  • Hydrogen passivation enhances the electrical characteristics of poly-Si TFT(Thin Film Transistor). However, the weak Si-H bonds, generated during hydrogenation, degrade the stability of the device. So, we carried out the passivation treatment with $NH_3$ or $N_2$. We compared the effect of $NH_3$ or $N_2$ passivation treatments with that of hydrogenation in terms of stability. Through the $NH_3$ passivation treatment, we obtained the most improved subthreshold swing of 1.2V/decade from the initial subthreshold swing of 1.56V/decade. When electrical stress was given, the $NH_3$ passivated devices showed best electrical stability.

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In-line Automatic Defect Repair System for TFT-LCD Production

  • Arai, Takeshi;Nakasu, Nobuaki;Yoshimura, Kazushi;Edamura, Tadao
    • Journal of Information Display
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    • v.10 no.4
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    • pp.202-205
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    • 2009
  • An automated circuit repair system was developed for enhancing the yield of nondefective liquid crystal panels, focusing on the resist patterns on the circuit material layer of thin-film transistor (TFT) substrates prior to etching. The developed system has an advantage over the parallel conventional system: In the former, the repair conditions depend on the type of resist whereas in the latter, the repair parameters must be fine-tuned for each circuit material. The developed system consists of a resist pattern defect inspection system and a pattern repair system for short and open defects. The repair system performs fine corrections of abnormal areas of the resist pattern. The open-repair system is equipped with a syringe to dispense resist. To maintain a stable resist diameter, a thermal insulator was installed in the syringe system. As a result, the diameter of the dispensed resist became much more stable than when no thermal insulator was used. The resist diameter was kept within the target of $400{\pm}100{\mu}m$. Furthermore, a prototype system was constructed, and using a dummy pattern, it was confirmed that the system worked automatically and correctly.

The Study of White uniformity improvement in TFT LCD using LED (LED적용 TFT-LCD 외관 백색 균일도 향상을 위한 광선 추적 시뮬레이션 연구)

  • Lee, San-Hwan;Yi, Jun-Sin;Lee, Seung-Jae
    • Proceedings of the KIEE Conference
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    • 2006.07c
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    • pp.1665-1666
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    • 2006
  • TFT-LCD(Thin Film Transistor Liquid Crystal Display)는 표시장치로서 실용화된 후 많은 상품에 적용중이다. 그러나, LCD는 자체 발광능력이 없으므로 그후면에서 LCD 화면을 밝혀주는 BLU(Backlight Unit)를 필요로 한다. BLU는 내부 광원으로 밝기가 균일한 평면광을 만들어 LCD 화면을 균일하게 면조사하는 역할을 한다. LCD가 적용되는 분야중 Note PC에는 광원으로 CCFL(Cold Cathode Fluorescent Lamp)가 적용되어 왔지만, 최근 고휘도, 박형화, 저소비 전력을 달성하기 위해 CCFL로는 한계가 있어 LED(Light Emitting Diode)를 적용한 BLU를 제작하기 위한 연구가 진행되고 있다. 본 연구에서는 점광원인 LED 적용한 LED에 있어서 요구되는 휘도 균일성을 향상시키기 위해서는 LED광원이 적용된 BLU의 외관 품질 향상을 위한 도광판 입광부 구조 최적화를 광추적 Simulation을 통해 예측하고 향상시킬 수 있는 구조를 제안한다. Simulation결과, 외관품질 개선을 위해 도광판 입광면에 130도의 Serration과 휘도를 향상하기 위해 도광판 밑면에 렌즈 형상의 바 구조를 도출해 적용한 결과 외관품질향상과 휘도향상을 얻었다.

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Enhancing Electrical Properties of Sol-Gel Processed IGZO Thin-Film Transistors through Nitrogen Atmosphere Electron Beam Irradiation (질소분위기 전자빔 조사에 의한 졸-겔 IGZO 박막 트랜지스터의 전기적 특성 향상)

  • Jeeho Park;Young-Seok Song;Sukang Bae;Tae-Wook Kim
    • Journal of the Microelectronics and Packaging Society
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    • v.30 no.3
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    • pp.56-63
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    • 2023
  • In this paper, we studied the effect of electron beam irradiation on sol-gel indium-gallium-zinc oxide (IGZO) thin films under air and nitrogen atmosphere and carried out the electrical characterization of the s ol-gel IGZO thin film transistors (TFTs). To investigate the optical properties, crystalline structure and chemical state of the sol-gel IGZO thin films after electron beam irradiation, UV-Visible spectroscopy, X-ray diffraction (XRD), and X-ray photoelectron spectroscopy (XPS) were carried out. The sol-gel IGZO thin films exhibited over 80% transmittance in the visible range. The XRD analysis confirmed the amorphous nature of the sol-gel IGZO films regardless of electron beam irradiation. When electron beam irradiation was conducted in a nitrogen (N2) atmosphere, we observed an increased proportion of peaks related to M-O bonding contributed to the improved quality of the thin films. Sol-gel IGZO TFTs subjected to electron beam exposure in a nitrogen atmosphere exhibited enhanced electrical characteristics in terms of on/off ratio and electron mobility. In addition, the electrical parameters of the transistor (on/off ratio, threshold voltage, electron mobility, subthreshold swing) remained relatively stable over time, indicating that the electron beam exposure process in a nitrogen atmosphere could enhance the reliability of IGZO-based thin-film transistors in the fabrication of sol-gel processed TFTs.

Remote O2 plasma functionalization for integration of uniform high-k dielectrics on large area synthesized few-layer MoSe2

  • Jeong, Jaehun;Choi, Yoon Ho;Park, Dambi;Cho, Leo;Lim, Dong-Hyeok;An, Youngseo;Yi, Sum-Gyun;Kim, Hyoungsub;Yoo, Kyung-Hwa;Cho, Mann?Ho
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.281.1-281.1
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    • 2016
  • Transition metal dichalcogenides (TMDCs) are promising layered structure materials for next-generation nano electronic devices. Many investigation on the FET device using TMDCs channel material have been performed with some integrated approach. To use TMDCs for channel material of top-gate thin film transistor(TFT), the study on high-k dielectrics on TMDCs is necessary. However, uniform growth of atomic-layer-deposited high-k dielectric film on TMDCs is difficult, owing to the lack of dangling bonds and functional groups on TMDC's basal plane. We demonstrate the effect of remote oxygen plasma pretreatment of large area synthesized few-layer MoSe2 on the growth behavior of Al2O3, which were formed by atomic layer deposition (ALD) using tri-methylaluminum (TMA) metal precursors with water oxidant. We investigated uniformity of Al2O3 by Atomic force microscopy (AFM) and Scanning electron microscopy (SEM). Raman features of MoSe2 with remote plasma pretreatment time were obtained to confirm physical plasma damage. In addition, X-ray photoelectron spectroscopy (XPS) was measured to investigate the reaction between MoSe2 and oxygen atom after the remote O2 plasma pretreatment. Finally, we have uniform Al2O3 thin film on the MoSe2 by remote O2 plasma pretreatment before ALD. This study can provide interfacial engineering process to decrease the leakage current and to improve mobility of top-gate TFT much higher.

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High rate deposition of poly-si thin films using new magnetron sputtering source

  • Boo, Jin-Hyo;Park, Heon-Kyu;Nam, Kyung-Hoon;Han, Jeon-Geon
    • Proceedings of the Korean Vacuum Society Conference
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    • 2000.02a
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    • pp.186-186
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    • 2000
  • After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

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Electrical, Structural, Optical Properties of the AZO Transparent Conducting Oxide Layer for Application to Flat Panel Display (평판디스플레이 응용을 위한 AZO 투명전도막의 전기적, 구조적 및 광학적 특성)

  • No, Im-Jun;Kim, Sung-Hyun;Park, Dong-Wha;Shin, Paik-Kyun
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.10
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    • pp.1976-1981
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    • 2009
  • Transparent conducting aluminum-doped zinc oxide (AZO) thin films were deposited on Coming glass substrate using an Gun-type rf magnetron sputtering deposition technology. The AZO thin films were fabricated with an AZO ceramic target (Zn: 98wt.%, $Al_2O_3$: 2wt.%). The AZO thin films were deposited with various growth conditions such as the substrate temperature, oxygen pressure. X -ray diffraction (XRD), UV/visible spectroscope, atomic force microscope (AFM), and Hall effect measurement system were done in order to investigate the properties of the AZO thin films Among the AZO thin films prepared in this study, the one formed at conditions of the substrate temperature $100^{\circ}C$, Ar 50 sccm, $O_2$ 5 sccm and working pressure 5 motor showed the best properties of an electrical resistivity of $1.763{\times}10^{-4}\;[{\Omega}{\cdot}cm]$, a carrier concentration of $1.801{\times}10^{21}\;[cm^{-3}]$, and a carrier mobility of $19.66\;[cm^2/V{\cdot}S]$, which indicates that it could be used as a transparent electrode for thin film transistor and flat panel display applications.

IGZO 박막트렌지스터의 열처리 조건에 따른 Ti/Au 전극 연구

  • Lee, Min-Jeong;Choe, Ji-Hyeok;Gang, Ji-Yeon;Myeong, Jae-Min
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2010.05a
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    • pp.54.1-54.1
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    • 2010
  • 산화물 기반의 TFT는 유리, 금속, 플라스틱 등 기판 종류에 상관없이 균일한 제작이 가능하며, 상온 및 저온에서 대면적으로 제작이 가능하고, 저렴한 비용으로 제작 가능하다는 장점 때문에 최근 많은 연구가 이루어지고 있다. 현재 TFT 물질로 많이 연구되고 있는 산화물은 ZnO (3.4 eV)나 InOx (3.6 eV), GaOx (4.9 eV), SnOx(3.7 eV)등의 물질과 각각의 조합으로 구성된 재료들이 주로 사용되고 있으며, 가장 많은 연구가 이루어진 ZnO 기반의 TFT는 mobility와 switching 속도에서 우수한 특성을 보이나, 트렌지스터의 안정성이 떨어지는 것으로 보고 되고 있다. 그러나 IGZO 물질의 경우 결정학적으로 비정질이며 상온 및 저온에서 대면적으로 제작이 가능하고, 높은 전자 이동도의 특성을 가지고 있는 장점 때문에 최근 차세대 산화물 트렌지스터로 각광받고 있다. IGZO TFT 소자의 경우 Ag, Au, In, Pt, Ti, ITO 등 다양한 전극 물질이 사용되고 있는데, 이들 중 active channel과 ohmic contact을 이루는 Al, Ti, Ag의 적용을 통해 향상된 성능을 얻을 수 있다. 하지만 이들 전극 재료는 TFT 소자 제작시 필수적인 열처리 공정에 노출되면서 active channel 과 전극 사이 계면에 문제점을 야기할 수 있다. 특히, Ti의 경우 산화가 잘되기 때문에 전극계면에 TiO2를 형성하여 contact resistance의 큰 영향을 미치는 것으로 보고 되고 있다. 본 연구에서는 ohmic 전극재료인 Ti 또는 Ti/Au를 적용하여 TFT 소자 제작 및 특성에 대한 평가를 진행했으며, 열처리에 따른 전극과 IGZO 계면 사이의 미세구조와 전기적인 특성간의 상관관계를 연구하였다. 이를 통해, 소자 제작 공정을 최적화하고 신뢰성 있는 소자 특성을 얻을 수 있었다.

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Effect of Channel Length and Drain Bias on Threshold Voltage of Field Enhanced Solid Phase Crystallization Polycrystalline Thin Film Transistor on the Glass Substrate (자계 유도 고상결정화를 이용한 다결정 실리콘 박막 트랜지스터의 채널 길이와 드레인 전압에 따른 문턱 전압 변화)

  • Kang, Dong-Won;Lee, Won-Kyu;Han, Sang-Myeon;Park, Sang-Geun;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 2007.07a
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    • pp.1263-1264
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    • 2007
  • 자계 유도 고상결정화(FESPC)를 이용하여 제작한 다결정실리콘(poly-Si) 박막 트랜지스터(TFT)는 비정질 실리콘 박막 트랜지스터(a-Si:H TFT)보다 뛰어난 전기적 특성과 우수한 안정성을 지닌다. $V_{DS}$ = -0.1 V에서 채널 폭과 길이가 각각 $5\;{\mu}m$, $7\;{\mu}m$인 P형 TFT의 이동도(${\mu}$)와 문턱 전압($V_{TH}$)은 각각 $31.98\;cm^2$/Vs, -6.14 V 이다. FESPC TFT는 일반 poly-Si TFT에 비해 채널 내 결정 경계 숫자가 많아서 상대적으로 열악한 특성을 가진다. 채널 길이 $5\;{\mu}m$인 TFT의 $V_{TH}$는 채널 길이 $18\;{\mu}m$ 소자의 $V_{TH}$보다 1.36V 작지만, 일반적으로 큰 값이다. 이 현상은 채널에 다수의 결정 경계가 존재하고, 수평 전계가 크기 때문이다. 수평 전계가 증가하면, 결정 경계의 전위 장벽 높이가 감소하게 되는데, 이는 DIGBL 효과이다. ${\mu}$의 증가에 따라서, 드레인 전류가 증가하고 $V_{TH}$은 감소한다. 활성화 에너지($E_a$)는 드레인 전압과 결정 경계의 수에 따라 변하는데, 드레인 전압이 크거나 결정 경계의 수가 감소하면 $E_a$는 감소한다. $E_a$가 감소하면 $V_{TH}$가 감소한다. 유리기판 위의 FESPC를 이용한 P형 poly-Si TFT의 $V_{TH}$는 채널의 길이와 $V_{DS}$에 영향을 받는다. 증가한 수평 전계가 결정 경계에서 에너지 장벽을 낮추는 효과를 일으키기 때문이다.

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