• ETRI Journal
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• 제31권6호
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• pp.660-666
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• 2009

We investigate the effects of interfacial dielectric layers (IDLs) on the electrical properties of top-gate In-Ga-Zn-oxide (IGZO) thin film transistors (TFTs) fabricated at low temperatures below $200^{\circ}C$, using a target composition of In:Ga:Zn = 2:1:2 (atomic ratio). Using four types of TFT structures combined with such dielectric materials as $Si_3N_4$ and $Al_2O_3$, the electrical properties are analyzed. After post-annealing at $200^{\circ}C$ for 1 hour in an $O_2$ ambient, the sub-threshold swing is improved in all TFT types, which indicates a reduction of the interfacial trap sites. During negative-bias stress tests on TFTs with a $Si_3N_4$ IDL, the degradation sources are closely related to unstable bond states, such as Si-based broken bonds and hydrogen-based bonds. From constant-current stress tests of $I_d$ = 3 ${\mu}A$, an IGZO-TFT with heat-treated $Si_3N_4$ IDL shows a good stability performance, which is attributed to the compensation effect of the original charge-injection and electron-trapping behavior.

• 한국재료학회지
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• 제33권11호
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• pp.491-496
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• 2023

As the demand for p-type semiconductors increases, much effort is being put into developing new p-type materials. This demand has led to the development of novel new p-type semiconductors that go beyond existing p-type semiconductors. Copper iodide (CuI) has recently received much attention due to its wide band gap, excellent optical and electrical properties, and low temperature synthesis. However, there are limits to its use as a semiconductor material for thin film transistor devices due to the uncontrolled generation of copper vacancies and excessive hole doping. In this work, p-type CuI semiconductors were fabricated using the chemical vapor deposition (CVD) process for thin-film transistor (TFT) applications. The vacuum process has advantages over conventional solution processes, including conformal coating, large area uniformity, easy thickness control and so on. CuI thin films were fabricated at various deposition temperatures from 150 to 250 ℃ The surface roughness root mean square (RMS) value, which is related to carrier transport, decreases with increasing deposition temperature. Hall effect measurements showed that all fabricated CuI films had p-type behavior and that the Hall mobility decreased with increasing deposition temperature. The CuI TFTs showed no clear on/off because of the high concentration of carriers. By adopting a Zn capping layer, carrier concentrations decreased, leading to clear on and off behavior. Finally, stability tests of the PBS and NBS showed a threshold voltage shift within ±1 V.

• 한국섬유공학회:학술대회논문집
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• 한국섬유공학회 2003년도 봄 학술발표회 논문집
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• pp.44-47
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• 2003

21C 고도정보화 시대를 맞이하여 평판표시소자에 대한 요구가 급증하여 현재는 액정표시소자 (Liquid Crystal Display, LCD)가 가장 널리 사용되고 있는데, 특히 해상도가 우수한 TFT(Thin Film Transistor)-LCD에 대한 수요가 급증하고 있다. Full color TFT-LCD를 구성하는 재료 중 가장 높은 비중을 차지하고 있는 것이 color filter이며, 이것을 제조하는 데 있어 가장 중요한 기술은 화소 형성기술이다. 특히 가격은 고가이지만 해상성이 뛰어난 TFT-LCD에 주로 사용되는 안료분산법은 신뢰성, 특히 내열성 및 공정의 복잡성 등 문제점을 가지고 있다[1]. (중략)

• 인포메이션 디스플레이
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• 제5권1호
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• pp.25-30
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• 2004

Poly-Si TFT(Thin Film Transistor) technology are reviewed and discussed. Poly-Si TFTs fabricated on glass using low-temperature process were studied extensively for the application to LCD (Liquid Crystal Display) as well as to OLED(Organic Light Emitting Diode) Display. Currently, one of the application targets of the poly-Si TFT is emphasized on the highly functional SOG(System on Glass). Improvement of device characteristics such as an enhancement of carrier mobility has been studied intensively by enlarging the grain size. Reduction of the voltage and shrinkage of the device size are the trend of AM FPD(Active Matrix Flat Panel Display) as well as of Si LSI, which will arise a peculiar issue of uniformity for the device performance. Some approaches such as nucleation control of the grain seed or lateral grain growth have been tried, so far.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.63-63
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• 2009

Many researchers have been studied as active and transparent electrode using ZnO (Zinc oxide) inorganic semiconductor material due to their good properties such as wide band-gap and high electrical properties compared with amorphous-Si. In this study, we fabricated ZnO films by the RF magnetron sputtering method at a low temperature for a channel layer in thin-film transistor (TFT) and investigated the characteristics of sputtered ZnO films. Also, the electrical properties of TFT using ZnO channel layer such as field effect mobility(${\mu}$), threshold voltage ($V_{th}$), and $I_{on/off}$ ratio are investigated for the application of the display and electronic devices.

• 한국소성가공학회:학술대회논문집
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• 한국소성가공학회 2003년도 The Korea-Japan Plastics Processing Joint Seminar
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• pp.73-77
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• 2003

The backlight unit(BLU) is used as a light source of TFT liquid-crystalline-display (TFT-LCD) module. In this backlight unit, one of important components is the light guide, which is usually made of transparent polymers. Currently the screen-printing method is mainly used for the light guide as a manufacturing process. However, it has limitation to the flexibility of three-dimensional optical design. In the present paper a new alternative manufacturing method for the light guide with low-cost is proposed. This manufacturing method is named as direct surface forming (DSF), which is very similar to the well-known hot embossing except for partial contact between mold and substrate. The results of this new manufacturing method are presented in terms of processing condition, dimensional accuracy, productivity, etc.

• 한국소성가공학회:학술대회논문집
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• 한국소성가공학회 2003년도 추계학술대회논문집
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• pp.221-224
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• 2003

Recently, the market share of the thin-film-transistor liquid-crystalline-display (TFT-LCD) is growing rapidly in display device market. The backlight unit is used as a light source of TFT-LCD module. A light-guide is one of several important components of backlight unit. The manufacturing technology and optical system design of the light guide is very sensitive to quality and cost of the TFT-LCD module. In the present study a new manufacturing method which is called as direct surface forming(DSF) has been tested under various conditions. The result of this test, V-groove pattern shows different shapes depends on the temperature of mold surface, contact time of mold and depth of V-groove.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.923-926
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• 2004

Active-matrix field emission display (AMFED) based on carbon nanotube (CNT) emitter and amorphous silicon thin-film transistor (a-Si TFT) is reviewed. The AMFED pixels consisted of a high-voltage a-Si TFT and mesh-gated CNT emitters. The developed AMFED panel showed a high performance with a driving voltage of below 15 V. The low-cost and large-area AMFED approach with a metal mesh technology will be discussed.

• 한국전기전자재료학회논문지
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• 제22권12호
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• pp.1058-1062
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• 2009

For the investigation of the mechanism of photoelectric characteristics of a hydrogenated amorphous silicon thin film transistor(a-Si:H TFT), spectral characteristics of various backlights were analyzed in terms of the photon energy at each wavelength. Photon energy spectral characteristics were obtained through the multiplication of each photon energy and spectral intensities of backlights at each wavelength and the total photon energies were obtained by the integration of the photon energy spectrums. From the comparison of the experimental photo leakage current and the calculated photon energy, it was possible to conclude that the absorption of illuminated backlight to a-Si:H layer and the generation of electrons and holes are mainly carried out at the wavelength less than 500 nm as described in previous reports.

• Journal of Electrical Engineering and Technology
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• 제6권4호
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• pp.539-542
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• 2011

Thin-film transistors (TFTs) are fabricated using an amorphous indium gallium zinc oxide (a-IGZO) channel layer by rf-magnetron sputtering. Oxygen partial pressure significantly changed the transfer characteristics of a-IGZO TFTs. Measurements performed on a-IGZO TFT show the change of threshold voltage in the transistor channel layer and electrical properties with varying $O_2$ ratios. The device performance is significantly affected by adjusting the $O_2$ ratio. This ratio is closely related with the modulation generation by reducing the localized trapping carriers and defect centers at the interface or in the channel layer.