• Proceedings of the Materials Research Society of Korea Conference
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• 2009.11a
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• pp.48.1-48.1
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• 2009

Performance of organic field-effect transistors (OFETs) with various temperature-cured polyacrylate(PA) copolymer as a gate insulator was studied. The PA thin film, which was cured at an optimized temperature, showed high dielectric strength (>7 MV/cm), low leakage current density ($5{\times}10^{-9}\;A/cm^2$ at 1 MV/cm) and enabled negligible hysteresis in MIS capacitor and OFET. A field-effect mobility of ${\sim}0.6\;cm^2/V\;s$, on/off current ratio (Ion/Ioff) of ${\sim}10^5$ and inverse subthreshold slope (SS) as low as 1.22 V/decwere achieved. The high dielectric strength made it possible to scale down the thickness of dielectric, and low-voltage operation of -5 V was successfully realized. The chemical changes were monitored by FT-IR. The morphology and microstructure of the pentacene layer grown on PA dielectrics were also investigated and correlated with OFET device performance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.9A
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• pp.678-683
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• 2003

The pseudo-noise (PN) code acquisition based on the sequential estimation (SE) proposed by Ward performs well only at relatively high chip signal-to-noise ratios (SNRs). In this paper, a seed accumulating sequential estimation (SASE) method and a PN code acquisition system based on it are proposed, which perform well at low chip SNR (of practical interest) also. Then, the mean acquisition time performance of the proposed system is investigated. Numerical results show that the system based on the SASE performs dramatically better than that based on the SE at low chip SNR, and the improvement becomes larger as the period of PN code increases.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.10
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• pp.1559-1562
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• 2022

As electronic devices technology scales down into the deep-submicron to achieve high-density, low power and high performance integrated circuits, multiple bit upsets by soft errors have become a major threat to on-chip memory systems. To address the soft error problem, single error correction, double error detection and double adjacent error correction (SEC-DED-DAEC) codes have been recently proposed. But these codes do not troubleshoot mis-correction problem. We propose the SEC-DED_DAEC code with without mis-correction. The decoder for proposed code is implemented as hardware and verified. The results show that there is no mis-correction in the proposed codes and the decoder can be employed on-chip memory system.

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.1305-1308
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• 1987

This paper presents a design of an optimized implantable biotelemetry system and the fabrication of custom CMOS LSI for implementing this system. The internal circuits of this system are fabricated on a single silicon chip with a size of $4{\times}5mm^2$. This LSI is designed and fabricated not only to get as small size and low power dissipation as possible, but also to have multiple function. Its main functions are to select one of implanted sensors and to accomplish ON - OFF power switching of an implanted battery by receiving appropriate Command signals and control signals fran external circuits. The internal system which was assembled on a bread-board using fabricated LSI chip is confirmed to work as designed. The total power dissipation of this interal system was $10.12{\mu}W$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.377-377
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• 2007

A simplified integration process including packaging is presented, which enables the realization of the portable fluorescence detection system. A fluorescence detection microchip system consisting of an integrated PIN photodiode, an organic light emitting diode (OLED) as the light source, an interference filter, and a microchannel was developed. The on-chip fluorescence detector fabricated by poly(dimethylsiloxane) (PDMS)-based packaging had thin-film structure. A silicon-based integrated PIN photo diode combined with an optical filter removed the background noise, which was produced by an excitation source, on the same substrate. The active area of the finger-type PIN photo diode was extended to obtain a higher detection sensitivity of fluorescence. The sensitivity and the limit of detection (LOD S/N = 3) of the system were $0.198\;nA/{\mu}M$ and $10\;{\mu}M$, respectively.

• Proceedings of the KIEE Conference
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• 1998.11a
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• pp.179-181
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• 1998

In this paper, one chip PWM pattern generator which eliminates time delay of computations and improves utilization factor of voltage is proposed. Both amplitude of sinusoidal signal and triangular signal are directly controlled. Thus, time delay of computations can be eliminated, and it is possible to track accurately instantaneous current for a sudden change of load with microprocessor 80C196KC. In addition, setting dead-time is also possible for wide range. From experimental work with inverter system for driving induction motor, the validity of proposed one chip PWM pattern generator is verified.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.2
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• pp.97-104
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• 2011

This paper deals with the quick and precise disaster prevention automation system (DPAS) based on information communication technology (IT) that detects fire and disasters in the building automatically and quickly and then activates the facilities to extinguish fire and disasters, monitoring such situation in a real time through wire-wireless communication network. The proposed DPAS is applied a programmable logic controller (PLC) of one-chip type which is smallsize and lightweight and also has highly sensitive-precise reliabilities. The one-chip type PLC analyzes detected signals from sensors in a case of fire and disasters, then activates fire extinguishing facilities for rapid suppression. The detected data is also transferred to a remote situation room through wire-wireless network of RS232c and bluetooth communication. The transferred data sounds an emergency alarm signal, and operates a monitoring program. The proposed DPAS based on IT will minimize the life and wealth loss from rapid measures while prevents fire and disasters.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.1_2
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• pp.125-134
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• 2004

Recently, an on-chip compressed cache system was presented to alleviate the processor-memory Performance gap by reducing on-chip cache miss rate and expanding memory bandwidth. This research Presents an extended on-chip compressed cache system which also significantly expands main memory capacity. Several techniques are attempted to expand main memory capacity, on-chip cache capacity, and memory bandwidth as well as reduce decompression time and metadata size. To evaluate the performance of our proposed system over existing systems, we use execution-driven simulation method by modifying a superscalar microprocessor simulator. Our experimental methodology has higher accuracy than previous trace-driven simulation method. The simulation results show that our proposed system reduces execution time by 4-23% compared with conventional memory system without considering the benefits obtained from main memory expansion. The expansion rates of data and code areas of main memory are 57-120% and 27-36%, respectively.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.4
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• pp.249-254
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• 2005

This paper presents a system-on-a-chip (SOC) design for digital TV. The single LSI incorporates almost all essential parts such as CPU, ISO/IEC 11172/13818 system/audio/video decoders, a video post-processor, a graphics/OSD processor and a display processor. It has analog IP's inside such as video DACs, an audio PLL, and a system PLL to reduce the system-level implementation cost. Descramblers and Smart Card interface are included to support widely used conditional access systems. The video decoder can decode two video streams simultaneously. The DSP-based audio decoder can process various audio coding specifications. The functional blocks for video quality enhancement also form outstanding features of this SoC. The SoC supports world-wide major DTV services including ATSC, ARIB, DVB, and DIRECTV.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.1
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• pp.147-154
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• 2009

This paper presents a grating~integrated SPR (Surface Plasmon Resonance) sensor chip for simple and inexpensive biomolecule detection. The grating-integrated SPR sensor chip has two sensing channels having a nano grating for SPR coupling. An external mirror is used for multi channel SPR sensing. The present sensor chip replaces bulky and expensive optical components, such as fiber-optic switches or special shaped prisms, resulting in a simple and inexpensive wavelength modulated multi-channel SPR sensing system. We fabricate a SPR sensor chip integrated with 835 nm-pitch gratings by a micromolding technique to reduce the fabrication cost. In the experimental characterization, the refractive index sensitivity of each sensing channel is measured as $321.8{\pm}8.1nm$/RI and $514.3{\pm}8.lnm$/RI, respectively. 0.5uM of the target biomolecule (streptavidin) was detected by a $1.13{\pm}0.16nm$ shift of the SPR dip in the 10%-biotinylated sample channel, while the SPR dip in the reference channel for environmental perturbation monitoring remained at the same position. From the experimental results, multi-channel biomolecule detection capability of the present grating-integrated SPR sensor chip has been verified. On the basis of the preliminary experiments, we successfully measured the binding reaction rate for the $2\;nM{\sim}200\;nM$ monoclonal-antibiotin, thus verifying biomolecule concentration detectability of the present SPR sensor chip. The binding reaction rates measured from the present SPR sensor chip agredd well with those from a commercialized SPR sensor.