• 제목/요약/키워드: System IC

검색결과 1,159건 처리시간 0.028초

적층 IC 패키지의 고장모드 분류와 대책 (Failure Modes Classification and Countermeasures of Stacked IC Packages)

  • 송근호;장중순
    • 한국신뢰성학회지:신뢰성응용연구
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    • 제16권4호
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    • pp.347-355
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    • 2016
  • Purpose: With the advance of miniaturization of electronic products, stacked packages of high density semiconductors are commonly used. Potential failure modes and mechanisms of stacked packages are identified. Methods: Failure modes and mechanisms of thin chip stacked packages are determined through the categorization and failure analysis: delamination, non-wet, crack, ESD, EMI and the process related damages. Results: Those failure modes are not easy to find and require excessive amount time and effort for analysis and subsequent improvement. Conclusion: In this study, a method of estimating the failure rate based on the strength measurement is suggested.

시퀀스 명령 고속처리 회로의 gate array (Gate array(custom IC) of high speed processing circuit for sequence instruction)

  • 유지훈;양오;신영민;안재봉;이종두
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1988년도 한국자동제어학술회의논문집(국내학술편); 한국전력공사연수원, 서울; 21-22 Oct. 1988
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    • pp.414-417
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    • 1988
  • Recently PLC pursues faster scanning time, circuit confidence, reliability improvement, and smaller size. To obtain above all merit, custom IC(Gate Array) is developed. Custom IC includes 5 main blocks and 2 auxiliary blocks. The 5 main blocks process faster sequential instruction execution by only logic gate using hexa instruction code system. And the 2 auxiliary blocks generate baud rate clock (153.6 KHz, 76.8KHz) to communicate between PLC and computer or programmers.

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AlGaAs/GaAs HBT를 사용한 10Gbit/s 리미팅증폭기 (10Gbit/s AlGaAs/GaAs HBT limiting amplifier)

  • 곽봉신;박문수
    • 전자공학회논문지D
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    • 제34D권7호
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    • pp.15-22
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    • 1997
  • A 10Gbit/s limiting amplifier IC for optical transmission system was implemented with AlGaAs HBT (heterojunction bipolar transistor) technology. HBTs with 2x10.mu. $m^{2}$ and 6x20.mu. $m^{2}$ emitter size were used. The HBT structures are based on metal-organic chemical vapor deposition (MOCVD) epitxy and employ a mesa structure with self-aligned emitter/base and sidewall dielectric passivation. IC was designed to support differnetial input and output. Small signal performance of the packaged IC showed 26dB gain and $f_{3dB}$ of 8GHz. A single ouput has 800m $V_{p-p}$ swing with more than 26dB dynamic range. The performance of the limiting amplifier was verified through single mode fiber320km transmission link test.est.

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Bi-2223/Ag HTS 장선재의 Ic 특성 향상 공정 연구 (Study on fabrication process of long length of Bi-2223/Ag MTS wires for high critical current)

  • 하동우;양주생;황선역;이동훈;최정규;하홍수;오상수;권영길
    • 한국초전도저온공학회:학술대회논문집
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    • 한국초전도저온공학회 2003년도 학술대회 논문집
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    • pp.105-108
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    • 2003
  • Long length of Bi-2223 superconducting wires were fabricated by stacking, drawing process with different precursor owders and different heat-treatment histories. The precursor powders were 2 kinds of Pb content. And a part of the tapes were experienced pre-annealing process which caused tetragonal structure of Bi-2212 phase to orthorhombic structure of it was during drawing process. We confirmed the transformation of Bi-2212 phase from tetragonal structure to orthorhombic structure and reduction of second phases. We designed and made a continuous Ic measurement system for Bi-2223/Ag HTS tape. We could achieve best Ic of 65 A at the Bi-2223/Ag tape using low Pb content of precursor powder and experienced pre-annealing process.

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IC를 이용한 전력량 측정에 관한 연구 (A study on power mesearement using Isolate IC)

  • 이종화;임정민;한태영;문채주
    • 한국조명전기설비학회:학술대회논문집
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    • 한국조명전기설비학회 2004년도 춘계학술대회 논문집
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    • pp.419-423
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    • 2004
  • This paper shows a new concept of digital power meter based on the optical sensing technique. The digital power meter with isolate IC so called Photocoupler is designed and implemented. The system composed of power and analong interface circuits, micro-controller and LCD display circuits. The most errors in power meter happen on measurement and calculation process for load voltages and currents. The suggested method on this paper is to use no noise sensor and PIC microprocessor. The results of simple test for power meter prototype are showed a nearly similar date to commercial product.

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Microprocessor에 의한 NOVA의 Emulator 설계 (Design of NOVA Emulator by Microprocessor)

  • 송영재
    • 대한전자공학회논문지
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    • 제13권2호
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    • pp.28-33
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    • 1976
  • 최근, Microprocessor가 염가로 입수가능함에 따라 광범위한 분야에 걸쳐서 사용되고 있다. microprocessor를 유효하게 사용하면 컴퓨터 시스템의 설계가 용이해진다. 이 논문에서는 MMI-6701을 사용하여 NOVA의 Emulator를 설계 하였으며 연구의 성과로서는 NOVA를 Microprocessor로 대치하므로서 IC의 수가 약 3분의 1로 대치할 수 있었고, 또 Emulator의 효율화를 위하여 PROM의 Micro명령은 32bit로서 구성하여 4종류의 명령형식으로 설계 되였다. In recent years, Microprocessor have the use of extended wide fiexd because of obtainable to low price. Design of computer system be easy to do by this microprocessor apply validly. This Papers: NOVA Emulator designed by use of MMI-6701. As a result of this studies, quantity of IC changed with about a third part by NOVA exchanged with Microprocessor. Micro Instruction of PROM consist of 32bit that designed Instruction Format of four kinds.

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고속 집적회로 패키지 인터커넥션을 위한 설계 데이타베이스 (A Design Database for High Speed IC Package Interconnection)

  • 설병수;이창구;박성희;;;유영갑
    • 전자공학회논문지A
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    • 제32A권12호
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    • pp.184-197
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    • 1995
  • In this paper, high speed IC package-to-package interconnections are modeled as lossless multiconductor transmission lines operating in the TEM mode. And, three mathematical algorithms for computing electrical parameters of the lossless multiconductor transmission lines are described. A semi-analytic Green's function method is used in computing per unit length capacitance and inductance matrices, a matrix square root algorithm based on the QR algorithm is used in computing a characteristic impedance matrix, and a matrix algorithm based on the theory of M-matrix is used in computing a diagonally matched load impedance matrix. These algorithms are implemented in a computer program DIME (DIagonally Matched Load Impedance Extractor) which computes electrical parameters of the lossless multiconductor transmission lines. Also, to illustrate the concept of design database for high speed IC package-to-package interconnection, a database for the multi conductor strip transmission lines system is constructed. This database is constructed with a sufficiently small number of nodes using the multi-dimensional cubic spline interpolation algorithm. The maximum interpolation error for diagonally matched load impedance matrix extraction from the database is 1.3 %.

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Anti-Complementary Activity of Protostane-Type Triterpenes from Alismatis Rhizoma

  • Lee, Sang-Myung;Kim, Jung-Hee;Zhang, Ying;An, Ren-Bo;Min, Byung-Sun;Joung, Hyouk;Lee, Hyeong-Kyu
    • Archives of Pharmacal Research
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    • 제26권6호
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    • pp.463-465
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    • 2003
  • Four protostane-type triterpenes, alisol B 23-acetate (1a), alisol C 23-acetate (2a), alisol B(3a), and alisol A 24-acetate (4a), were isolated from the rhizome of Alismatis plantago-aquatica L. var. orientale Samuelson (Alismataceae) and eleven protostane derivatives (compounds 1-11) were obtained by selective modification from alisol B 23-acetate (1a). These compounds were investigated for their anti-complement activity against the classical pathway of the complement system. Alisol B (3a) and alisol A 24-acetate (4a) exhibited anti-complement activity with $IC_{50} values of 150 and 130 \mu$ M. Among the synthetic derivatives, the tetrahydroxylated protostane triterpene (9) showed moderate inhibitory activity with $IC_{50} value of 97.1 \mu$ M. Introduction of an aldehyde group at C-23 (10; $IC_{50} value, 47.7 \mu$ M) showed the most potent inhibitory effect on the complement system in vitro.

On-Line 및 OFF-Line 겸용 전자화폐 (Electronic Money for On-Line and Off-Line)

  • 황욱선;신창균
    • 한국정보과학회논문지:컴퓨팅의 실제 및 레터
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    • 제8권3호
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    • pp.295-302
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    • 2002
  • 이 논문에서는 전자화폐 시스템 사용의 기술적인 문제점에 관한 몇가지 해결방안을 제안한다. 그 해결책은 온/오프 라인 겸용 전자화폐, 원카드, 주문형 시스템, 카드 대 카드 이체 시스템 등이다. 이 대안들이 엔젤플러스 전자화폐 사례에서 소스코드로 기술되었다. 전자화폐는 IC형과 네트워크형으로 분류 한다. 그러나 그들은 통합되어야 한다 최종사용자는 편리성을 위하여 겸용으로 사용되기를 원한다. 이 논문에서는 사례연구에 의하여 온/오프 라인 겸용 전자화폐를 개발한다. 이 논문을 바탕으로 미래연구에서는 소비자지향의 다양한 기능을 소유한 전자화폐 개발이 진행되어야 할 것이다.