• Proceedings of the KIEE Conference
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• 1998.07a
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• pp.346-348
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• 1998

The stability of Power system installed Hi-Tc Superconducting Fault Current Limiter(SFCL) is analyzed as a process of developing SFCL. In interpretation, simple mimic system(only one motor) is assumed and then the circuit with SFCL in system is solved. In case the SFCL is installed in Power system, it protected synchronization more effectively both in symmetrical 3-phase fault and single phase line to ground fault.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.884-885
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• 2007

This paper presents an window based user-friendly designed characteristics analysis program of permanent-split capacitor single-phase induction motor. For the analysis, equivalent magnetic circuit and symmetrical coordinate method are used. The saturation effect and iron loss of stator and rotor core are considered. The analysis program is made to GUI type which can be used easily by many elementary designer. The accuracy of analysis is verified by comparison with experimental results.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.7
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• pp.905-912
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• 2013

Power system fault analysis is commonly based on well-known symmetrical component method, which describes power system elements by positive, negative and zero sequence impedance. In case of balanced fault, such as three phase short circuit, transmission line can be represented by positive sequence impedance only. The majority of fault in transmission lines, however, is unbalanced fault, such as line-to-ground faults, so that both positive and zero sequence impedance is required for fault analysis. When unbalanced fault occurs, zero sequence current flows through earth and skywires in overhead transmission systems and through cable sheaths and earth in cable transmission systems. Since zero sequence current distribution between cable sheath and earth is dependent on both sheath bondings and grounding configurations, care must be taken to calculate zero sequence impedance of underground cable transmission lines. In this paper, conventional and EMTP-based sequence impedance calculation methods were described and applied to 345kV cable transmission systems (4 circuit, OF 2000mm2). Calculation results showed that detailed circuit analysis is desirable to avoid possible errors of sequence impedance calculation resulted from various configuration of cable sheath bonding and grounding in underground cable transmission systems.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.16 no.1
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• pp.76-84
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• 2002

Voltage sags caused by line faults in transmission and distribution lines have become one of the most important power quality problems facing industrial customers and utilities. Voltage sags are normally described by characteristics of both magnitude and duration, but phase angle shifts should be taken account in identifying sag phenomena and finding their solutions. In this paper, voltage sags due to line faults such as three phase-to-ground, single line-to-ground, and line-to-line faults are characterized by using symmetrical component analysis, for fault impedance variations. Voltage sags and their effect on the magnitude and phase angle are examined. Balanced sags of three phase-to-ground faults show that voltages and currents are changed with equivalent levels to all phases and the zero sequence components become zero. However, for unbalanced faults such as single line-to-ground and line-to-line faults, voltage sags give different magnitude variations and phase angle shifts for each phase. In order to verify the analyzed results, some simulations based on power circuit models are also discussed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.2
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• pp.210-215
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• 2017

We have developed the neuromorphic system that can work with the four-terminal Si-based synaptic devices and verified the operation of the system using simulation tool and printed-circuit-board (PCB). The symmetrical current mirrors connected to the n-channel and p-channel synaptic devices constitute the synaptic integration part to express the excitation and the inhibition mechanism of neurons, respectively. The number and the weight of the synaptic devices affect the amount of the current reproduced from the current mirror. The double-stage inverters controlling delay time and the NMOS with large threshold voltage ($V_T$) constitute the action-potential generation part. The generated action-potential is transmitted to next neuron and simultaneously returned to the back gate of the synaptic device for changing its weight based on spike-timing-dependent-plasticity (STDP).

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.8
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• pp.884-890
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• 2008

In this paper, Characteristics responded to frequency of a band-pass filter with admittance inverters(J-inverters) is considered. As a result, it is confirmed that attenuation characteristics of upper and lower frequency is asymmetric. And a modified circuit and design formulas are proposed to improve the asymmetric attenuation characteristics. By confirming the simulated and measured results that are got from designed and made a experiment on the band-pass filter with the proposed circuit and formulas for design, we confirm that the asymmetric attenuation characteristics of the band-pass filter are improved without any optimization or iterative design procedures and additional calculation efforts.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.51 no.9
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• pp.467-473
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• 2002

In this paper, a fault location algorithm is suggested for line to line faults in distribution networks. Conventional fault location algorithms use the symmetrical component transformation, a very useful tool for transmission network analysis. However, its application is restricted to balanced network only. Distribution networks are, in general, operated in unbalanced manners, therefore, conventional methods cannot be applied directly, which is the reason why there are few research results on fault location in distribution networks. Especially, the line to line fault is considered as a more difficult subject. The proposed algorithm uses direct 3-phase circuit analysis, which means it can be applied not only to balanced networks but also to unbalanced networks like distribution a network. The comparisons of simulation results between one of conventional methods and the suggested method are presented to show its effectiveness and accuracy.

• Proceedings of the KIEE Conference
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• 2002.07a
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• pp.108-110
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• 2002

In this paper, a fault location algorithm is suggested for line to line faults in distribution networks. Conventional fault location algorithms use the symmetrical component transformation, a very useful tool for transmission network analysis. However, its application is restricted to balanced network only. Distribution networks are, in general, operated in unbalanced manners, therefore, conventional methods cannot be applied directly, which is the reason why there are few research results on fault location in distribution networks. Especially, the line to line fault is considered as a more difficult subject. The proposed algorithm uses direct 3-phase circuit analysis, which means it can be applied not only to balanced networks but also to unbalanced networks like distribution a network. The comparisons of simulation results between one of conventional methods and the suggested method are presented to show its effectiveness and accuracy.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.2
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• pp.71-76
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• 2016

A controller area network (CAN) receiver measures differential voltage on a bus to determine the bus level. Since 3.3V transceivers generate the same differential voltage as 5V transceivers (usually ${\geq}1.5V$), all transceivers on the bus (regardless of supply voltage) can decipher the message. In fact, the other transceivers cannot even determine or show that there is anything different about the differential voltage levels. A new CMOS RC oscillator insensitive supply voltage for clock generation in a CAN transceiver was fabricated and tested to compensate for this drawback in CAN communication. The system consists of a symmetrical circuit for voltage and current switches, two capacitors, two comparators, and an RS flip-flop. The operational principle is similar to a bistable multivibrator but the oscillation frequency can also be controlled via a bias current and reference voltage. The chip test experimental results show that oscillation frequency and power dissipation are 500 kHz and 5.48 mW, respectively at a supply voltage of 3.3 V. The chip, chip area is $0.021mm^2$, is fabricated with $0.18{\mu}m$ CMOS technology from SK hynix.

• Journal of Power Electronics
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• v.16 no.2
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• pp.572-583
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• 2016

In view of the speed control characteristics of induction traction motors and the problems of direct torque control (DTC) algorithms in current applications, this paper presents a DTC algorithm characterized by a symmetrical polygon flux control and a closed loop power control in the constant-torque base speed region and constant-power field-weakening region of induction traction motors. This algorithm only needs to add a stator flux control algorithm to the traditional DTC structures. This has the benefit of simplicity, while maintaining the features of traditional algorithms such as a rapid dynamic response, uncomplicated control circuit, reduced dependence on motor parameters, etc. In addition, it obtains a smoother flux trajectory that is conducive to improvement of the harmonic elimination capability, the switching frequency utilization as well as the torque and power performance in the field-weakening region. The effectiveness and feasibility of this DTC algorithm are demonstrated by both theoretical analysis and experimental results.