• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
• /
• 2013.04a
• /
• pp.135-140
• /
• 2013

This paper deals with noise reduction on a light source driving board in a projector. We analyze causes of noise/vibration in the circuit with the present increasing use of LD and LED driving boards. The main source of noise is the MLCC in the driving board. Our aim is to investigate how the mechanical arrangement of the circuit elements affects noise reduction. The result of our experiment shows that noise can be reduced by symmetrical arrangement and slots in PCB. This result is expected to facilitate a variety of applications for manufactures without a need to change circuit elements.

• Proceedings of the KIEE Conference
• /
• 2003.07b
• /
• pp.870-872
• /
• 2003

This paper deals with the characteristic analysis of capacitor-run single phase induction motor by equivalent circuit. The unbalanced elliptic rotating magnetic field of the motor was analysed by the symmetrical coordinate method. And this paper check the reliability of characteristic analysis by equivalent circuit in comparison with experimental results and analyse the characteristics of single phase induction motors by changing circuit parameters. Finally, this paper shows the improved effiency design motor by using that result.

• Proceedings of the KIEE Conference
• /
• 2000.11d
• /
• pp.781-783
• /
• 2000

1bit full adder have 3 input (including carry_in) and 2 outputs(Sum and Carry_out). Because of 1 bit full adder's propagation delay. We usually use 4-bit binary full adder with fast carry, 74LS283. The 74LS283 is positive logic circuit chip. But the logic function of binary adder is symmetrical, so it can be possible to use it not only positive logic but also the negative logic. This thesis use symmetrical property. such as $C_{i+1}(\bar{a_i}\bar{b_i}\bar{c_i})=C_{i+1}{\bar}(a_i,\;b_i,\;c_i)$ and $S_i(\bar{a_i}\bar{b_i}\bar{c_i})=\bar{S_i}(a_i,\;b_i,\;c_i)$. And prove this property with logic operation. Using these property, the 74LS283 adder is possile as the negation logic circuit. It's very useful to use the chip in negative logic. because many system chip is negative logic circuit. for example when we have negative logic chip with 74LS283. we don't need any not gate for 74LS283 input, and just use output of adder(74LS283) as the negation of original output.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.16 no.7 s.98
• /
• pp.661-670
• /
• 2005

In this paper, the microstrip $90^{\circ}$ hybrid to provide -3dB coupling and $90^{\circ}$ phase difference at broadband frequency range of 2 to 6 GHz is designed. This proposed hybrid is composed of 3-section. The two outside section are realized by symmetrical edge coupled lines, but on the other hand the middle section consists of VIP(Vertically Installed Planar) circuit. The ground part of VIP circuit is partially removed to get tight coupling, particularly. This hybrid is easy to realize due to microstrip structure and has good holing flexibility by taking advantage of VIP circuit as a control point of optimization. The proposed hybrid provide satisfactory performance as compared with simplicity of structure and fabrication first of all.

• Journal of Advanced Marine Engineering and Technology
• /
• v.24 no.6
• /
• pp.34-42
• /
• 2000

In this paper conventional technique will be described, which can be used for the measuring various parameters of induction motor. This is followed by presenting some other, alternative, techniques. The two tests are described which are suitable to obtain the electrical parameters of symmetrical 1hp three-phase squirrel-cage induction motor. These are the blocked rotor test and no load test. By the application of these, it is possible to determine the parameters which are presented in the steady-state equivalent-circuit of determining an induction motor. One conventional method of determining the inertia of an induction motors is obtained by performing retardation tests. The angular rotor speed of the motor is monitored, following its disconnection from the stator supply. Since the inertia torque J dw/dt contains the inertia coefficient J and the friction and windage torque Bw contains the coefficient B, then J and B can be determined by performing retardation tests.

• The Transactions of the Korean Institute of Electrical Engineers B
• /
• v.53 no.8
• /
• pp.517-524
• /
• 2004

In this paper, a novel zero-voltage-switching(ZVS) resonant DC-DC converter is proposed. It is composed of two symmetrical active-clamped circuits, the converter can be achieve ZVS in each switches. Also, active clamp capacitor ratios($\alpha$) of proposed circuit can be reduce a peak stress of switching voltage for each main switch. Simulation results using Pspice 9.2 ver and $C^{++}$ characteristic analysis show a provement for the validity of theoretical analysis. The analysis of the proposed Current-Fed Push Pull type DC-DC converter is generally described by using normalized parameter, and achieved an evaluated characteristic values which is needed to design a circuit. We confirm a rightfulness theoretical analysis by comparing a theoretical values and experimental values obtained from experiment using MOSFET as switching devices.

• Journal of IKEEE
• /
• v.19 no.2
• /
• pp.265-270
• /
• 2015

In this paper, we proposed a dual-directional SCR (silicon-controlled rectifier) based ESD (electrostatic discharge) protection circuit. In comparison with conventional SCR, this ESD protection circuit can provide an effective protection against ESD pulses in the two opposite directions, so the ESD protection circuit can be discharged in two opposite direction. The proposed circuit has a higher holding voltage characteristic than conventional SCR. These characteristic enable to have latch-up immunity under normal operating conditions as well as superior full chip ESD protection. it was analyzed to figure out electrical characteristics in term of individual design parameters. They are investigated by using the Synopsys TCAD simulator. In the simulation results, it has trigger voltage of 6.5V and holding voltage increased with different design parameters. The holding voltage of the proposed circuit changes from 2.1V to 6.3V and the proposed circuit has symmetrical I-V characteristic for positive and negative ESD pulse.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
• /
• 2003.11a
• /
• pp.279-281
• /
• 2003

We analysed the operating properties of resistive type superconducting fault current limiters (SFCLs) based on YBCO thin films with a single line-to-ground fault. When a single line-to-ground fault occurred, the short circuit current of a fault phase increased up to about 6 times of transport currents immediately after the fault instant and was effectively limited to the designed current level within 2 ms by the resistance development of the SFCL. The fault currents of the sound phases almost did not change because of their direct grounding system. The unsymmetrical rates of a fault phase were distributed from 6.4 to 1.4. It was found that the unsymmetrical rates of currents were noticeably improved within one cycle after the fault instant. We calculated the zero phase currents for a single line-to-ground fault using the symmetrical component analysis. The positive sequence resistance was reduced remarkably right after the fault but eventually approached the balanced positive resistance component prior to the system fault. This means that the system reaches almost the three-phase symmetrical state in about 60 ㎳ after the fault. The ground currents were almost 3 times of the zero phase mts since most of the fault currents flowed through the grounding line.

• Transactions of the Korean Society for Noise and Vibration Engineering
• /
• v.23 no.6
• /
• pp.495-501
• /
• 2013

This paper deals with noise reduction on a light source driving board in a projector. We analyze causes of noise/vibration in the circuit with the present increasing use of LD and LED driving boards. The main source of noise is the MLCC in the driving board. Our aim is to investigate how the mechanical arrangement of the circuit elements affects noise reduction. The result of our experiment shows that noise can be reduced by symmetrical arrangement and slots in PCB. This result is expected to facilitate a variety of applications for manufactures without a need to change circuit elements.

• Journal of Power Electronics
• /
• v.12 no.1
• /
• pp.208-214
• /
• 2012

This paper presents a novel approach based on the loci of instantaneous symmetrical components called "Wing Shape" which requires the measurement of three input stator currents and voltages to diagnose interturn insulation faults in three phase induction motors operating under different loading conditions. In this methodology, the effect of unbalanced supply conditions, constructional imbalances and measurement errors are also investigated. The sizes of the wings determine the loading on the motor and the travel of the wings while their areas determine the degree of severity of the faults. This approach is also applied to detect open circuit faults or single phasing conditions in induction motors. In order to validate this method, experimental results are presented for a 5 hp squirrel cage induction motor. The proposed technique helps improve the reliability, efficiency, and safety of the motor system and industrial plant. It also allows maintenance to be performed in a more efficient manner, since the course of action can be determined based on the type and severity of the fault.