• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2010.07a
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• pp.185-187
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• 2010

최근 3D HDTV에 대한 연구가 활발히 이루어지고 있다. 우리나라에서도 3D HDTV 표준을 제정하기 위한 준비가 이루어지고 있으며, 이와 같은 흐름에 맞추어 기존의 ATSC 전송 방식을 확장한 전송 방식이 연구되고 있다. 확장된 ATSC 전송 방식은 지상파 3D HDTV 방송을 목표로 하고, 프레임 구조를 중국의 지상파 방송 표준인 DMB-T와 유사하게 PN 시퀀스와 데이터로 이루어진 방식으로 이용하고자 한다. 연구되고 있는 확장된 전송방식은 기존의 ATSC 시스템의 VSB 변조방식을 기반으로 한다. 프레임 구조는 PN 시퀀스와 데이터 심볼의 구조를 가지며 이 PN을 이용하여 심볼 타이밍 오차를 복구한다. PN을 이용하기 위해 수신 단에서는 가장먼저 프레임 동기를 이루어야 하므로, 본 논문에서는 확장된 ATSC 전송 시스템 방식에 적용 가능한 프레임 동기와 심볼 타이밍 복구에 관한 방식을 제안하였다.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.775-779
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• 1999

This paper presents design of AGC(Automatic Gain Control) and DC offset remover suitable for cable modem which makes use of QAM(Quadrature Amplitude Modulation) scheme. Since QAM has multi-level signal characteristic, for high-order QAM, the constellation is dense and the distance of decision boundary between adjacent symbols is short. So AGC and DC offset remover must be designed optionally for preventing performance degradation. AGC is designed into feedback type and is related to the STR(Symbol Timing Recovery)and Paff interpolation algorithm. Whereas AGC need to perform average power detection during many symbols by comparison with the reference power, DC offset remover uses only the instant polarity decision such that simple implementation can be achieved with good performance. Though the AGC and DC offset remover are simulated here only for 256 QAM scheme for convenience'sake, it can be applied to other multi-level QAM or PSK modulation scheme.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.45 no.4
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• pp.78-83
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• 2008

Interpolation filters are widely used in symbol timing recovery systems to interpolate new sample values at arbitrary points between the existing discrete-time samples. Polynomial interpolation is interpolated by coefficient made inputted information. This paper presents an efficient way to implement polynomial base interpolation filters using support filter changing input. By an example, it is shown that the proposed structure out performs the conventional interpolation structure with less hardware cost.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2005.11a
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• pp.109-112
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• 2005

ATSC 지상파 DTV 시스템에서 심볼 타이밍 동기 성능 개선을 위한 알고리즘을 제안한다. 일반적으로 심볼 타이밍 동기를 위해 사용되는 가드너 방법은 다중 경로 페이딩 환경에서 성능이 좋지만 지터에 의해 성능 열화가 발생한다. 지터량는 루프 필터 대역폭이 작을수록 작아지지만, 수렴속도는 느려지게 된다. 수렴속도는 빠르면서 수렴 후 지터량를 감소시키기 위해 일정시간마다 루프필터의 출력 값을 평균하고 이 평균값을 이용하여 옵셋량을 추정한 후 추정된 옵셋의 변화율에 따라 루프 필터의 대역폭을 줄여 지터의 크기를 줄이는 알고리즘을 제안한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.4
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• pp.815-820
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• 1998

A new coding algorithm which has spectrum notches at the DC and Nyquist Frequency for maximizing the effect of the in-band pilot insertion in order to make the symbol timing or carrier recovery easy is proposed. It is shown that this algorithm uses one encoder and gives the similar spectrum characteristics to that of the existing OF00 code which uses two encoder. In this paper, the proposed new coding algorithm is explained andits spectrum characteristics is compared with the of OF00 code using computer simulation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.3 no.3
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• pp.687-694
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• 1999

In this paper, to draw out the parameter of synchronization for ADSL(Asymmetric Digital Subscriber Line) chip design, we analyze the performance of STR(Symbol Timing Recovery) and frame synchronization with computer simulation. We analyze and design PLL(Phase Lock Loop) loop for ADSL. As a result, we obtained the optimum parameter of STR to design ADSL chip. Also, when performed frame synchronization with several algorithm, we analyzed the performance of FER(Frame Error Rate) and the effect of frame offset with computer simulation.

• The Journal of the Acoustical Society of Korea
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• v.31 no.7
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• pp.441-448
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• 2012

Spread spectrum provides the minimized inter-symbol interference, the low probability of intercept and the multiple access capability. This paper presents a direct sequence spread spectrum with carrier/timing recovery and equalizer which compensates the delay spread caused by multipath transmission. When the sea trials were performed in Korean East Sea, the bit error rates of QPSK and direct sequence spread spectrum are $1.46{\times}10^{-2}$ and $5.17{\times}10^{-4}$ at 3 km source-receiver range, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.1
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• pp.69-74
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• 2003

In this paper, we propose the synchronization recovery algorithm which is suitable to wireless Multimedia of wireless channel situation which is being used OFDM signaling method. The basic of the suggested clock synchronization. restoration Algorithm is to getting the shock response of channel or getting the multipath strength profile through IFTT after the getting the frequency, response of deducted channel from channel deducted of receiver and to trace the location in the channel energy concentrated area of timing area. And it also analysis the start point of 64-QAM and 16-QAM if the sampling clock offset has the sample of ${\pm}$ 1-3, and we identified the occurance of performance deterioration when occures more than 2 samples of offset to compare with star point and BER performance in optimum sampling point result of BER performance checking, and we know that the recovery algorithm proposed algorithm also provide excellent synchronization characteries under frequency, selecting fading channel as result of simulation.

• Journal of Korea Society of Industrial Information Systems
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• v.8 no.1
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• pp.83-91
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• 2003

High-speed QPSK demodulator has been in important design objective of any wireless communication systems, especially those offering broadband multimedia service. This paper describes all-digital QPSK demodulator for high-speed wireless communications, and its hardware structures are discussed. All-digital QPSK demodulator is mainly composed of symbol time circuit and carrier recovery circuit to estimate timing and phase-offsets. There are various schemes. Among them, we use Gardner algorithm and Decision-Directed carrier recovery algorithm which is most efficient scheme to warrant the fast acquisition and tacking to fabricate FPGA chip. The testing results of the implemented onto CPLD-EPF10K100GC 503-4 chip show demodulation speed is reached up to 2.6[Mbps]. If it is implemented a CPLD chip with speed grade 1, the demodulation speed can be faster by about 5 times. Actually in case of designing by ASIC, its speed my be faster than CPLD by 5 times. Therefore, it is possible to fabricate the all-digital QPSK demodulator chipset with speed of 50[Mbps].

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.10
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• pp.27-33
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• 2004

In this paper, we present a carrier recovery circuit using the polarity-decision algorithm that recovers a phase and a frequency error simultaneously. The proposed algorithm catches a frequency error based on a differential of an angular velocity of the signal constellations. Using the differential of a phase error may compensate the frequency error. The symbol prediction method in the proposed algorithm accumulates the symbols, which makes easy to calculate a phase differential. The hardware size of the algerian is small since we use Q data or I only to get phase information. As a result, the algerian shows a pull-in range of normalized frequency error 0.5 under AWGN 15dB.