• 제목/요약/키워드: Switching ripple current

검색결과 282건 처리시간 0.021초

Output Voltage Ripple Analysis and Design Considerations of Intrinsic Safety Flyback Converter Based on Energy Transmission Modes

  • Hu, Wei;Zhang, Fangying;Xu, Yawu;Chen, Xinbing
    • Journal of Power Electronics
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    • 제14권5호
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    • pp.908-917
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    • 2014
  • For the purpose of designing an intrinsic safety Flyback converter with minimal output voltage ripple based on a specified output current, this paper first classified the energy transmission modes of the system into three sorts, namely, the Complete Inductor Supply Mode-CCM (CISM-CCM), the Incomplete Inductor Supply Mode-CCM (IISM-CCM) and the Incomplete Inductor Supply Mode-DCM (IISM-DCM). Then, the critical secondary self-inductance assorting the three modes are deduced and expressions of the output voltage ripples (OVR) are presented. For a Flyback converter with constant loads and switching frequency, it is shown that the output voltage ripple in the CISM-CCM is the smallest and that it has no relationship with the secondary self-inductance. Otherwise, the OVR of the other two modes are bigger than the previously mentioned one. It is concluded that the critical inductance between the CISM-CCM and the IISM-CCM is the minimal secondary self-inductance to ensure the smallest output voltage ripple. At last, a design method to guarantee the minimum OVR within the scales of the input voltage and load are analyzed, and the minimum secondary self-inductance is proposed to minimize the OVR. Simulations and experiments are given to verify the results.

Active CDS-Clamped L-Type Current-Fed Isolated DC-DC Converter

  • Nguyen, Minh-Khai;Duong, Truong-Duy;Lim, Young-Cheol;Choi, Joon-Ho
    • Journal of Power Electronics
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    • 제18권4호
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    • pp.955-964
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    • 2018
  • In this paper, an active capacitor-diode-switch (CDS) snubber is proposed for L-type current-fed isolated DC-DC converters. The proposed CDS-clamped converter has a number of advantages. It can achieve wide range zero-voltage switching (ZVS) on two switches, a continuous input current with a low ripple, a reduction of one active switch and high efficiency. The operating principles, analysis and parameter design guideline are presented. A 300 W prototype is built to test the proposed converter. Simulation and experimental results are shown at 30 V input voltage and 400 V output voltage.

SRM의 최적운전을 위한 스위칭각 선정에 관한 연구 (Study on Switching Angle Characteristic for Optimal Driving Condition of SRM)

  • 오석규;이상훈;김창섭;안진우
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 전력전자학술대회 논문집
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    • pp.231-234
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    • 2001
  • The torque of SRM depends on phase current and the derivative of inductance. But the inductance of SRM is nonlinearly changed according to rotor position angle and phase current because of saturation in magnetic circuit. Therefore this has a concern in torque ripple and speed variation, and it is difficult to control the desired torque The torque of SRM depends on phase current and the derivative of inductance. But the inductance of SRM is nonlinearly changed according to rotor position angle and phase current because of saturation in magnetic circuit, and it is difficult to control the desired torque. This paper proposes an optimization control scheme by adjusting both the turn-on and turn-off angle according to high efficiency points which are simulated by GA-Neural Network, which is used to simulate the reasonable switching angle which is nonlinearly varied with rotor speed and load.

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전류 리플 저감을 위한 듀얼 인덕터 방식의 양방향 dc-to-dc 컨버터 (Bidirectional dc-to-dc Converter Employing Dual Inductor for Current Ripple Reduction)

  • 이기영;강필순
    • 전기학회논문지
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    • 제67권4호
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    • pp.531-537
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    • 2018
  • This paper propose a bidirectional dc-to-dc converter employing dual inductor for current ripple reduction. Conventional bidirectional dc-to-dc converter uses a single inductor for two different modes; boost and buck; therefore it is difficult to satisfy the optimized inductance value for each mode. To improve this problem, the proposed converter adds two switches, a diode, and one inductor. By proper switching of the additional switch, the proposed converter operates with a inductor in boost mode, but it works with dual inductor in buck mode. Hence in both modes the proposed bidirectional converter can be operated with optimized inductance values. Most of all the optimized inductance in buck mode can reduce the current ripple and its effective value(rms), which are directly related to the temperature increase resulted in short lifetime of battery. To verify the validity of the proposed approach, we first analyzes the operation of the proposed converter theoretically, and implement computer-aided simulations and experiments using a prototype.

Interleaved High Step-Up Boost Converter

  • Ma, Penghui;Liang, Wenjuan;Chen, Hao;Zhang, Yubo;Hu, Xuefeng
    • Journal of Power Electronics
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    • 제19권3호
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    • pp.665-675
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    • 2019
  • Renewable energy based on photovoltaic systems is beginning to play an important role to supply power to remote areas all over the world. Owing to the lower output voltage of photovoltaic arrays, high gain DC-DC converters with a high efficiency are required in practice. This paper presents a novel interleaved DC-DC boost converter with a high voltage gain, where the input terminal is interlaced in parallel and the output terminal is staggered in series (IPOSB). The IPOSB configuration can reduce input current ripples because two inductors are interlaced in parallel. The double output capacitors are charged in staggered parallel and discharged in series for the load. Therefore, IPOSB can attain a high step-up conversion and a lower output voltage ripple. In addtion, the output voltage can be automatically divided by two capacitors, without the need for extra sharing control methods. At the same time, the voltage stress of the power devices is lowered. The inrush current problem of capacitors is restrained by the inductor when compared with high gain converters with a switching-capacitor structure. The working principle and steady-state characteristics of the converter are analyzed in detail. The correctness of the theoretical analysis is verified by experimental results.

IPMSM 드라이브에서 전류 기울기 정보를 이용한 데드타임 및 인버터 비선형성 효과의 간단한 제거 기법 (Simple On-line Elimination Strategy of Dead Time and Nonlinearity in Inverter-fed IPMSM Drive Using Current Slope Information)

  • 박동민;김명복;김경화
    • 전력전자학회논문지
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    • 제17권5호
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    • pp.401-408
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    • 2012
  • A simple on-line elimination strategy of the dead time and inverter nonlinearity using the current slope information is presented for a PWM inverter-fed IPMSM (Interior Permanent Magnet Synchronous Motor) drive. In a PWM inverter-fed IPMSM drive, a dead time is inserted to prevent a breakdown of switching device. This distorts the inverter output voltage, resulting in a current distortion and torque ripple. In addition to the dead time, inverter nonlinearity exists in switching devices of the PWM inverter, which is generally dependent on operating conditions such as the temperature, DC link voltage, and current. The proposed scheme is based on the fact that the d-axis current ripple is mainly caused by the dead time and inverter nonlinearity. To eliminate such an influence, the current slope information is determined. The obtained current slope information is processed by the PI controller to estimate the disturbance caused by the dead time and inverter nonlinearity. The overall system is implemented using DSP TMS320F28335 and the validity of the proposed algorithm is verified through the simulation and experiments. Without requiring any additional hardware, the proposed scheme can effectively eliminate the dead time and inverter nonlinearity even in the presence of the parameter uncertainty.

Three-Level SEPIC with Improved Efficiency and Balanced Capacitor Voltages

  • Choi, Woo-Young;Lee, Seung-Jae
    • Journal of Power Electronics
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    • 제16권2호
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    • pp.447-454
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    • 2016
  • A single-ended primary-inductor converter (SEPIC) features low input current ripple and output voltage up/down capability. However, the switching devices in a two-level SEPIC suffer from high voltage stresses and switching losses. To cope with this drawback, this study proposes a three-level SEPIC that uses a low voltage-rated switch and thus achieves better switching performance compared with the two-level SEPIC. The three-level SEPIC can reduce switch voltage stresses and switching losses. The converter operation and control method are described in this work. The experimental results for a 500 W prototype converter are also discussed. Experimental results show that unlike the two-level SEPIC, the three-level SEPIC achieves improved power efficiency with balanced capacitor voltages.

Dual-Coupled Inductor High Gain DC/DC Converter with Ripple Absorption Circuit

  • Yang, Jie;Yu, Dongsheng;Alkahtani, Mohammed;Yuan, Ligen;Zhou, Zhi;Zhu, Hong;Chiemeka, Maxwell
    • Journal of Power Electronics
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    • 제19권6호
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    • pp.1366-1379
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    • 2019
  • High-gain DC/DC converters have become one of the key technologies for the grid-connected operation of new energy power generation, and its research provides a significant impetus for the rapid development of new energy power generation. Inspired by the transformer effect and the ripple-suppressed ability of a coupled inductor, a double-coupled inductor high gain DC/DC converter with a ripple absorption circuit is proposed in this paper. By integrating the diode-capacitor voltage multiplying unit into the quadratic Boost converter and assembling the independent inductor into the magnetic core of structure coupled inductors, the adjustable range of the voltage gain can be effectively extended and the limit on duty ratio can be avoided. In addition, the volume of the magnetic element can be reduced. Very small ripples of input current can be obtained by the ripple absorption circuit, which is composed of an auxiliary inductor and a capacitor. The leakage inductance loss can be recovered to the load in a switching period, and the switching-off voltage spikes caused by leakage inductance can be suppressed by absorption in the diode-capacitor voltage multiplying unit. On the basis of the theoretical analysis, the feasibility of the proposed converter is verified by test results obtained by simulations and an experimental prototype.

Interleaved ZVS DC/DC Converter with Balanced Input Capacitor Voltages for High-voltage Applications

  • Lin, Bor-Ren;Chiang, Huann-Keng;Wang, Shang-Lun
    • Journal of Power Electronics
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    • 제14권4호
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    • pp.661-670
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    • 2014
  • A new DC/DC converter with zero voltage switching is proposed for applications with high input voltage and high load current. The proposed converter has two circuit modules that share load current and power rating. Interleaved pulse-width modulation (PWM) is adopted to generate switch control signals. Thus, ripple currents are reduced at the input and output sides. For high-voltage applications, each circuit module includes two half-bridge legs that are connected in series to reduce switch voltage rating to $V_{in}/2$. These legs are controlled with the use of asymmetric PWM. To reduce the current rating of rectifier diodes and share load current for high-load-current applications, two center-tapped rectifiers are adopted in each circuit module. The primary windings of two transformers are connected in series at the high voltage side to balance output inductor currents. Two series capacitors are adopted at the AC terminals of the two half-bridge legs to balance the two input capacitor voltages. The resonant behavior of the inductance and capacitance at the transition interval enable MOSFETs to be switched on under zero voltage switching. The circuit configuration, system characteristics, and design are discussed in detail. Experiments based on a laboratory prototype are conducted to verify the effectiveness of the proposed converter.

단상제어형 3상 PWM 승압용 컨버터의 시뮬레이션 (Simulation of three Phase PWM Boost converter)

  • 강욱중;김상돈;전중함;이광수;서기영;이현우
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 하계학술대회 논문집 F
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    • pp.2668-2670
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    • 1999
  • In the past, the PWM converter had a large switching loss by hard switching and difficult to high frequency operation. The resonance converter to decrease the switching loss and EMI is required the frequency control and needed to reduce the voltage or current stress at each parts. So, this paper propose the 3-phase boost converter and the method to compensated input power factor by control the amplitude - an instantaneous value of the DC inductor current -and control the switching frequency that a modulation error by the ripple of the DC inductor current. The proposed 3-phase PWM boost converter of single phase control type can takes higher capacity and compensate the power factor by using Feed back controller at each phase for the existing 3-phase bridge rectifier type. Moreover the 3-phase full bridge type using the rectifier at each 3-phase circuit will be small size reactor and compensate input power factor by minimize harmonic components of each phase.

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