• Title/Summary/Keyword: Switching power

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A novel IGBT with improved electrical characteristics (향상된 전기적 특성을 갖는 IGBT에 관한 연구)

  • Koo, Yong-so
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.6 no.3
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    • pp.168-173
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    • 2013
  • In this paper, we tried different two approach to improve the performance of the IGBT. The first approach is that adding N+ region beside P-base in the conventional IGBT. It can make the conventional IGBT to get faster turn-off time and lower conduction loss. The second approach is that adding P+ region on right side under gate to improve latching current of conventional IGBT. The device simulation results show improved on-state, latch-up and switching characteristics in each structure. The first one was presented lower voltage drop(3.08V) and faster turn-off time(3.4us) than that of conventional one(3.66V/3.65us). Also, second structure has higher latching current(369A/?? ) that of conventional structure. Finally, we present a novel IGBT combined the first approach with second one for improved trade-off characteristic between conduction and turn-off losses. The proposed device has better performance than conventional IGBT.

Electronic Ballast Design for Power Factor Improvement and Harmonic Reduction (역률개선 및 고조파 저감을 위한 전자식 안정기 설계)

  • Lee, Chung-Sik;Cho, Moon-Taek;Na, Seung-Kwon
    • Journal of Advanced Navigation Technology
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    • v.18 no.5
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    • pp.483-489
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    • 2014
  • Proposed electronic ballast circuit for harmonic reduction includes adding lossless snubber circuit to DC-DC converter. To get inverter for changing DC-AC, a lamp has been changed to equivalence resistance in the standard lamp voltage and current data, also inverter circuit has been interpreted by being changed to R, L, C equivalence circuit. Using converted equivalent circuit, the most suitable circuit constant which can satisfy the characteristics of fluorescent lamps has been decided on and finally designed. It could not only eliminate distortion waveform from pulsation frequency in inverter direct side current but also reduce considerably pulsation rate and switching loss by making input current of inverter discontinuous. The validity for the results of this study has been verified through the experiment to measure harmonic occurrence after applying a newly-manufactured product of electronic ballast to 40 W line tube style fluorescent lamps.

A sensor controller for map building of home service robot using low cost PSD sensor (저가형 PSD센서를 이용한 홈서비스 로봇의 Map building용 센서 제어시스템)

  • Hyun, Wong-Keun;Lee, Chang-Hwan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.10
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    • pp.1897-1904
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    • 2006
  • Home service robot must recognize and build map for indoor and components of the house such as furniture and chair etc. The previous researcher has developed a indoor map building system by using CCD camera and ultra sonic sensor. %no stems have some problem in such a way that (1) a distun resolution can be changed according to the number of pixel when we use a CCD camera system, (2) a measured distance can be decreased when it transmitted to the rubber because of being absorbed the sound energy. This paper represents an intelligent sensor controller of module has been developed by using optic PSD(Position Sensitive Detector) sensor any at a low price. To deduce the switching noise from beam power module and diffused reflection noise, we proposed a heuristic soft filter. The performance of the developed system was compared with ultra sonic sensor system by detecting the indoor wall environment. Some experiments were illustrated for the validity of the developed system.

A design of radiation hardened common signal processing module for sensors in NPP (내방사선 원전센서 공통 신호처리 모듈 설계)

  • Lee, Nam-ho;Hwang, Young-gwan;Kim, Jong-yeol;Lee, Seung-min
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.6
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    • pp.1405-1410
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    • 2015
  • In this study we designed the radiation-hardened sensor signal processing modules that can be commonly used for a variety of sensors during normal operation and even in high-radiation environments caused by an accident. First development module was designed to receive the change of the R and C value from the sensors and to process the signal as a PWM modulation scheme. This module was assessed to have ± 10% error to the Full-Scale in the radiation test in the range of 12 kGy TID. The main cause of the error was analyzed as the annealing of the common circuit in the switching element and the consequent increase in the duty ratio of the pulse width modulation circuit according to the radiation dose increasement. The redesigned module for higher radiation resistivity with Stub transistor circuit was found to have less than 5% error to the Full-scale from the radiation test results for 20.7 kGy TID range.

Time-Multiplexed RF Transmission to Improve $B_1$ Homogeneity in High Field MRI

  • Han, Byung-Hee;Seo, Jeung-Hun;Heo, Hye-Young;Lee, Soo-Yeol
    • Journal of Biomedical Engineering Research
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    • v.29 no.2
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    • pp.99-106
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    • 2008
  • To improve $B_1$ homogeneity in high field MRI, the RF power is applied to the transmit array coil elements sequentially in the time-multiplexed way. Since only a single coil element is activated in a time-multiplexing slot, the global standing wave formation in the human body is greatly suppressed. The time-multiplexing slot width is on the order of micro seconds, hence, high-order-harmonic slices can be placed far from the transmit coil and simultaneous multiple slice selection can be avoided. The $B_1$ homogeneities of a birdcage coil and an eight-channel transmit array coil have been compared through finite difference time domain simulations. The simulation results indicate that the proposed technique can reduce the peak-to-peak $B_1$ inhomogeneity down to one fourth of the transmission with a birdcage coil on the central plane of the human head model at 3 T. The mimicking experiments at 3 T, eight separate experiments with a single coil element activated and image reconstruction by combining the eight images, also show promising results. It is expected that the proposed technique has some advantages over other $B_1$ improving methods in real practice since simple RF switching circuitries are only necessary and electromagnetic coupling between the coil elements is out of concern in its realization.

Partial Discharge Characteristics of Epoxy for Ignition Coil (점화코일용 에폭시의 부분방전 특성)

  • Shin Jong-Yeol;Hong Jin-Woong
    • Journal of the Korean Society of Safety
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    • v.19 no.4 s.68
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    • pp.141-149
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    • 2004
  • The automobile equipped with a gasoline engine uses the ignition coil, namely, a high voltage generator, to make the mixed fuel ignited and burned in the combustion chamber, which results in the power to drive the engine. The ignition coil functions to convert a low voltage of the primary into a hiか voltage of the secondary by switching method, which will be transmitted to the electrode. Here, if the ignition coil has a defect even a little, it cannot function well. In this study, it was chosen epoxy molding ignition coil in recently and epoxy resin which is insulation material as specimens, and it was measured the characteristics of the partial discharge occurring to the specimens when those were applied to a voltage, and thereby, it was researched and analyzed the distribution of phase angle, amount and count of discharge due to the changing voltage, And as the result is applying to the actual automobile ignition system, it can be expected the enhancement of the performance of the ignition coil and the reliability of the electrical equipment.

Leakage Energy Management Techniques via Shared L2 Cache Partitioning (캐시 파티션을 이용한 공유 2차 캐시 누설 에너지 관리 기법)

  • Kang, Hee-Joon;Kim, Hyun-Hee;Kim, Ji-Hong
    • Journal of KIISE:Computer Systems and Theory
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    • v.37 no.1
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    • pp.43-54
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    • 2010
  • The existing timeout based cache leakage management techniques reduce the leakage energy consumption of the cache significantly by switching off the power supply to the inactive cache line. Since these techniques were mainly proposed for single-processor systems, their efficiency is reduced significantly in multiprocessor systems with a shared L2 cache because of the cache interferences among simultaneously executing tasks. In this paper, we propose a novel cache partition strategy which partitions the shared L2 cache considering the inactive cycles of the cache line. Furthermore, we propose the adaptive task-aware timeout management technique which considers the characteristics of each task and adapts the timeout dynamically. Experimental results from the simulation show that the proposed technique reduces the leakage energy consumption of the shared L2 cache by 73% for the 2-way CMP and 56% for the 4-way CMP on average compared to the existing representative leakage management technique, respectively.

High Efficiency Resonant Asymmetrical Half-Bridge Flyback Converter (고효율 공진형 비대칭 하프브리지 플라이백컨버터)

  • Jeong, Gang-Youl;Yoo, Doo-Hee
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.24 no.4
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    • pp.81-94
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    • 2010
  • This paper presents a high efficiency resonant asymmetrical half-bridge flyback converter. The primary half-bridge circuit of the converter operates by a soft-switching type using the asymmetrical pulse-width modulation (PWM) method with the resonant capacitance and transformer leakage inductance. The secondary flyback circuit of the proposed converter utilizes a synchronous rectifier, which operates by a new voltage-driven method with a simple drive circuit. Thus the proposed converter improves the total efficiency. This paper explains the operational principle of the proposed converter by each mode and shows the converter design consideration and a design example for the prototype converter, respectively. After that, the proposed simple driving technique of the synchronous rectifier by a voltage-driven method is explained, briefly. The designed prototype converter has wide input voltage (AC $V_{in,rms}$=75~265[V]), 5[V] DC output voltage, and 100[W] output power. To verify the excellent performance of the proposed converter, the designed prototype is implemented and experimented. The good performance of the proposed converter is shown through the experimental results.

All-optical Data Extraction Based on Optical Logic Gates (반도체 광 증폭기를 이용한 전광 데이터 추출)

  • Lee, Ji Sok;Jung, Mi;Lee, Hyuk Jae;Lee, Taek Jin;Jhon, Young Min;Lee, Seok;Woo, Deok Ha;Lee, Ju Han;Kim, Jae Hun
    • Korean Journal of Optics and Photonics
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    • v.23 no.4
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    • pp.143-146
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    • 2012
  • All-optical data extraction, one of the key technologies for all-optical computing and optical communication to perform add-drop, packet switching, and data reset, etc., is experimentally demonstrated by using cross-gain modulation (XGM) of semiconductor optical amplifiers (SOAs). Also, all-optical data extraction based on numerical simulation is performed by using the VPI simulation tool. In this paper, the suggested optical system based on SOAs shows the potential for high speed, and highly integrable and low power optical data computing.

A Latency Optimization Mapping Algorithm for Hybrid Optical Network-on-Chip (하이브리드 광학 네트워크-온-칩에서 지연 시간 최적화를 위한 매핑 알고리즘)

  • Lee, Jae Hun;Li, Chang Lin;Han, Tae Hee
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.7
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    • pp.131-139
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    • 2013
  • To overcome the limitations in performance and power consumption of traditional electrical interconnection based network-on-chips (NoCs), a hybrid optical network-on-chip (HONoC) architecture using optical interconnects is emerging. However, the HONoC architecture should use circuit-switching scheme owing to the overhead by optical devices, which worsens the latency unfairness problem caused by frequent path collisions. This resultingly exert a bad influence in overall performance of the system. In this paper, we propose a new task mapping algorithm for optimizing latency by reducing path collisions. The proposed algorithm allocates a task to a certain processing element (PE) for the purpose of minimizing path collisions and worst case latencies. Compared to the random mapping technique and the bandwidth-constrained mapping technique, simulation results show the reduction in latency by 43% and 61% in average for each $4{\times}4$ and $8{\times}8$ mesh topology, respectively.