• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.4
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• pp.259-267
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• 2019

An active clamp flyback (ACF) converter applies a clamp circuit and circulates the energy of leakage inductance to the input side, thereby achieving a zero-voltage switching (ZVS) operation and greatly reducing switching losses. The switching losses are further reduced by applying a gallium nitride field effect transistor (GaN-FET) with excellent switching characteristics, and ZVS operation can be accomplished under light load with boundary conduction mode (BCM) operation. Optimal design is performed on the basis of loss analysis by selecting magnetization inductance based on BCM operation and a clamp capacitor for loss reduction. Therefore, the size of the reactive element can be reduced through high-frequency operation, and a high-efficiency and high-power-density converter can be achieved. This study proposes an optimal design for a high-efficiency and high-power-density BCM ACF converter based on GaN-FETs and verifies it through experimental results of a 65 W-rated prototype.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.150-154
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• 2000

This paper proposes PFC boost converter with soft switching for harmonics decrement and analyzes characteristics of PFC boost converter. In this technique power factor correction(PFC) is usually obtained by operating the PFC stage in the discontinuous current mode(DCM) Switching devices are operated for reducing current stress and electronical noise. As a result eliminate 3rd harmonic component and high power factor(PF) of the input line are verified by characteristics analysis and experimental results.

• Journal of Power Electronics
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• v.2 no.3
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• pp.199-205
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• 2002

This paper compares three kinds of soft-switching circuits from viewpoints of surge suppression, load characteristic, and power efficiency for a tapped-inductor buck converter with low voltage and high current. As a result, these soft-switching techniques have achieved much higher efficiency of 80 % when compared with a hard-switching buck converter for the output condition of 1V and 20A.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.8
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• pp.851-856
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• 2010

This paper presents an efficiency enhancement for the balanced power amplifier using DBS(Dynamic Bias Switching) method which dynamically provides the power amplifier with two bias voltage levels according to the input envelope signal. In order to apply the dynamic biases to each side of the balanced power amplifier, two switching stages are adopted. Using an OFDM signal with a bandwidth of 20 MHz and a PAR(Peak to Average Ratio) of 8.5 dB, 6 % of PAE(Power-Added Efficiency) is improved at an output power of 42.5 dBm.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.361-364
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• 2013

Since the non-overlapping gate driver used in conventional DC-DC boost converters generates fixed dead-times, the converters suffer from the body-diode conduction loss or the charge-sharing loss. A adaptive control method has been proposed to reduce these loses. In this method, however, occurrence of and overlapping time of two power transistors in CCM results in reduction of efficiency. In this paper, to overcome this problem a new adaptive control method in proposed, and a DC-DC boost converter with the proposed adaptive control and power switching has been designed in a 0.35um CMOS process. The designed converter outputs 3.3V from a input voltage of 2.5V. The switching frequency is 500kHz and the maximum power efficiency is 95.3% at a load current 150mA. The designed chip area is $1720um{\times}1280um$.

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.1
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• pp.19-25
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• 1999

To achieve high efficiency in high power and high frequency applications, reduction of switching losses and noise is very important. In this paper, an improved zero voltage switching forward dc/dc converter is proposed. The proposed converter is constructed by using energy recovery snubbers in parallel with the main switches and output diodes of the conventional forward dc/dc converter. Due to the use of the energy recovery snubbers in the primary and secondary side, the proposed converter achieves zero-voltage-switching turn-off without switching losses for switching devices and output rectification diodes. The complete operating principles and experimental results will be presented.

• Journal of Electrical Engineering and Technology
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• v.12 no.5
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• pp.1872-1882
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• 2017

Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.

• Proceedings of the KIPE Conference
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• 2007.11a
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• pp.34-36
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• 2007

A new soft switching boost converter is proposed in this paper. The conventional boost converter generates switching losses at turn on and off. Because of that, the whole system efficiency is reduced. The proposed converter utilizes soft switching method using an auxiliary switch and resonant circuit. Thus, the converter reduces switching losses lower than ones of hard switching method. The proposed soft switching boost converter can be applied to photovoltaic system, power factor correction circuit and so on.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.2
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• pp.193-199
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• 2015

This paper proposes a regeneration braking algorithm for Brushless DC (BLDC) motor system. The unipolar switching method has a limitation about the regeneration braking when the BLDC motor is operated in the low speed region. The proposed algorithm alternatively utilizes the unipolar and bipolar switching method to implement the regeneration braking for overall speed range. The bipolar switching method is used when the BLDC motor is operated in the low speed region. The switching transition point is determined by analyzing the unipolar and bipolar switching during the regeneration braking. The effectiveness of proposed algorithm is verified by using the experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.2
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• pp.116-123
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• 2014

In this paper, a soft-switching scheme for the PWM interleaved buck converter(IBC) is newly proposed to obtain the advantages of both the conventional PWM interleaved buck and resonant converters such as ease of control, reduced switching losses and stresses, and low EMI. To obtain the soft-switching action, the proposed scheme employs an auxiliary circuit, which is added to the conventional interleaved buck converter and used to achieve soft-switching for both the main switches and the output diodes while not incurring any additional losses due to the auxiliary circuit itself. In this paper, the basic operations are discussed and design guidelines are presented. And through the experimental results, the usefulness of the proposed converter is verified.