• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.11
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• pp.55-63
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• 1999

A new CMOS If Package design methodology is presented, analyzing the electrical characteristics of a package and its effects on the CMOS digital circuits. An analytical investigation of the package noise effects due to the simultaneous switching of the gates within a chip, i.e., simultaneous switching noise (SSN) is performed. Then not only are novel design formula to meet electrical constraints of the Package derived, but also package design methodology based on the formula is proposed. Further, in order to demonstrate the Proposed design methodology, the design results are compared with HSPICE (a general purpose circuit simulator) simulation for $0.3\mu\textrm{m}$-based CMOS circuits. According to the proposed design procedures, it is shown that the results have excellent agreements with those of HSPICE simulation.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.311-312
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• 2015

본 논문에서는 Unipolar PWM 스위칭 (Totem pole) 방법을 사용하는 단상인버터에서 나타나는 common mode noise를 저감시키는 스위칭 방법을 제안한다. 제안하는 방법은 출력전압의 중성점(N)을 입력전압 양단에 항상 고정하도록 스위칭을 하여 Common Mode Noise를 저감했다. 이를 Matlab Simulink를 사용한 모의해석과 실험을 통하여 Noise의 원인과 효과를 입증하였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.1
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• pp.67-75
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• 2011

This paper investigates the radiated emission from the enclosure aperture, when the enclosure contains a 4-layer PCB and the PCB is driven by a pulse train additive with the switching noise from an active device. Radiated emission characteristics with and without switch noise cases, respectively, are analyzed by changing the PCB location and the slot direction. The equivalent circuit of a DC-DC converter is used to simulate the switching noise of active device. Also, MWS simulation results are directly connected to the ADS simulator as a 2-port block. The simulated results are compared with the measured ones.

• Journal of Institute of Control, Robotics and Systems
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• v.20 no.1
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• pp.12-17
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• 2014

In this paper, we propose a controller capable of reducing the effect of measurement errors under AC and DC noise. Typically, the control system measures data through a sensor. If sensor noise is included in a controller via the feedback channel, the signal is distorted and the entire system cannot work normally. Therefore, some appropriate action to counter the measurement error effect is essential in the controller design. Our controller is equipped with a gain-scaling factor and a compensator to reduce the effect of measurement error in the feedback signal. Also, we use a switching control strategy to enhance the performance of the controller regarding convergence speed. Our proposed controller can therefore effectively reduce the AC and DC noise of the sensor. We analyze the proposed controller by Laplace transform technique and our control method is verified via MATLAB simulation.

• Proceedings of the KIPE Conference
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• 1998.07a
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• pp.265-268
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• 1998

This paper presents a soft-switching average current control PWM high power factor boost converter. Conventional boost ZVT-PWM converter has a disadvantage of hard-switching for auxiliary switch at turn-off. A soft switched auxiliary switch is proposed to achieve a high performance ZVT-PWM boost rectifier. The simulation and experimental results show that soft switching operation can be maintained for wide line and load range, which in turn improves the converter performance in terms of efficiency, switching noise and circuit reliability.

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.2197-2204
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• 2015

In recent years, medical image diagnosis has growing significant momentous in the medicinal field. Brain and lung image of patient are distorted with salt and pepper noise is caused by moving the head and chest during scanning process of patients. Reconstruction of these images is a most significant field of diagnostic evaluation and is produced clearly through techniques such as linear or non-linear filtering. However, restored images are produced with smaller amount of noise reduction in the presence of huge magnitude of salt and pepper noises. To eliminate the high density of salt and pepper noises from the reproduction of images, a new efficient fuzzy based median filtering algorithm with a moderate elapsed time is proposed in this paper. Reproduction image results show enhanced performance for the proposed algorithm over other available noise reduction filtering techniques in terms of peak signal -to -noise ratio (PSNR), mean square error (MSE), root mean square error (RMSE), mean absolute error (MAE), image enhancement factor (IMF) and structural similarity (SSIM) value when tested on different medical images like magnetic resonance imaging (MRI) and computer tomography (CT) scan brain image and CT scan lung image. The introduced algorithm is switching filter that recognize the noise pixels and then corrects them by using median filter with fuzzy two-sided π- membership function for extracting the local information.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.2
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• pp.628-649
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• 2017

Security and resource-saving are both demands of the fifth generation (5G) wireless networks. In this paper, we study the secrecy spectrum efficiency (SSE) and secrecy energy efficiency (SEE) of a K-tier massive multiple-input multiple-output (MIMO) enabled heterogeneous cellular network (HetNet), in which artificial noise (AN) are employed for secrecy enhancement. Assuming (i) independent Poisson point process model for the locations of base stations (BSs) of each tier as well as that of eavesdroppers, (ii) zero-forcing precoding at the macrocell BSs (MBSs), and (iii) maximum average received power-based cell selection, the tractable lower bound expressions for SSE and SEE of massive MIMO enabled HetNets are derived. Then, the influences on secrecy oriented spectrum and energy efficiency performance caused by the power allocation for AN, transmit antenna number, number of users served by each MBS, and eavesdropper density are analyzed respectively. Moreover, the analysis accuracy is verified by Monte Carlo simulations.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.129-132
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• 2001

This paper presents an efficient method to estimate the maximum SSN (simultaneous switching noise) for ground interconnection networks in CMOS systems using Taylor's series and analyzes the truncation error that has occurred in Taylor's series approximation. We assume that the curve form of noise voltage on ground interconnection networks is linear and derive a polynomial expression to estimate the maximum value of SSN using $\alpha$-power MOS model. The maximum relative error due to the truncation is shown to be under 1.87% through simulations when we approximate the noise expression in the 3rd-order polynomial.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.7
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• pp.11-19
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• 1998

A signal line potential variation due to the delta-I noise was physically investigated in CMOS integrated circuits. An equivalent circuit for the noise analysis was presented. The signal line was modeled as segmented RC-lumped circuits with the ground noise. Then the equivalent circuit was mathematically analyzed. Therebvy a new signal line potential variation model due to the switching mosie was developed. Th emodel was verified with 0.35.mu.m CMOS deivce model parameters. The model has an excellent agreement with HSPICE simulation. Thus the proposed model can be dirctly employed in the industry to design the high-performance integrted circuit design as well as integrated circuit package design.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.542-545
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• 2002

This paper deals with the optimization inverter design and minimization Conduced EMI noise by customizing IPM(Intelligent Power Module). Generally, In case of IPM, we realized that the trade-off relation between switching loss and spike voltage. Higher gate resistor causes tile lower spike voltage and the higher turn-off switching loss. But we know that the life cycle of inverter and the susceptibility of noise, so we optimized the gate resistor. Proposed method is that optimized the gate resistor suitable for the inverter and motor. The simulation and experimental results show that the spike voltage and Conduced EMI noise can be reduced without the additional circuit.