• 제목/요약/키워드: Switching Noise

검색결과 619건 처리시간 0.025초

DC링크 전류센서를 이용한 삼상전류 측정 방식에서 최소 스위칭 시간의 단축 (Reduction of Minimum Switching Duration in the Measurement of Three Phase Current with DC-Link Current Sensor)

  • 김경서
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제52권12호
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    • pp.649-654
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    • 2003
  • The simplest method for measuring output currents of the three phase inverters is to measure them with three current sensors such as hall sensors. This method requires at least two current sensors, and these types of sensors are somewhat expensive. More economical method is measuring DC link current with a simple shunt resistor, then, reconstructing output current using the DC link current value and the switching status. However, in low speed region, the measurement becomes difficult and even impossible due to the requirement of minimum switching duration for A/D conversion. These problems can be overcome by limitation of switching duration. Limitation of switching, however, causes voltage and current distortion. Owing to compensation, distortion can be effectively suppressed. However these increase acoustic noise due to increment of current ripple. In this paper, a current measurement method is proposed, which can reduce minimum switching duration resulting in reduction of acoustic noise. The validity of proposed method is confirmed through experiment.

준공진형 프라이백 스위칭 레귤레이터를 적용한 SMPS의 방사노이즈 억제 (Suppression of Radiation-Noise in the SMPS by using Quasi-Resonant Flyback Switching Regulator)

  • 나병훈;김영록;박성우;김진일
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2005년도 전력전자학술대회 논문집
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    • pp.137-139
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    • 2005
  • 본 논문에서는 30W급 스위칭형 직류전원장치 (Switching Mode Power Supply : SMPS)에 준공진형 프라이 백 스위칭 레귤레이터(quasi-resonant flyback switching regulator)를 적용하여 방사노이즈(radiation-noise)를 억제한 사례에 대하여 설명하고 있다. 기존의 PI사(社)의 TOP IC 시리즈$^{[1]}$와 같이 보편적으로 사용되고 있는 일명, 하드 스위칭(hard-switching)형 레귤레이터를 사용할 경우, 고속 스위칭시에 스위칭 손실(switching loss)과 스위칭 노이즈(switching noise)가 발생한다. 이로 인하여 SMPS의 발열에 따른 효율저화와 방사 노이즈에 의한 전파방해 등이 문제점이 된다. 본 논문에서는 일본의 Sanken사(社)에서 개발/시판중인 준공진형 스위칭 레귤레이터인 STR-F6000 IC 시리즈$^{[2]}$를 이용하여 프라이백 SMPS를 구성하여 방사노이즈를 저감하였다.

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Balanced Buck-Boost Switching Converter to Reduce Commom-mode Conducted Noise

  • Shoyama, Masahito;Ohba, Masashi;Ninomiya, Tamotsu
    • Journal of Power Electronics
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    • 제2권2호
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    • pp.139-145
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    • 2002
  • Because conventional switching converters have been usually using unbalanced circuit topologies, parasitice between the drain/collertor of an active switch and frame ground through its heat sink may generate the commom-mode conducted noise. We have proposed a balanced switching converter circuit, whitch is an effective way to reduce the commom-mode converter version of the balanced switching converter was presented and the mechanism of the commom-mode noise reduction was explained using equivalent circuits. This paper extends the concept of the balanced switch converter circuit and presents a buck-boost converter version of the blanced switching converter. The feature of common-mode niose reduction is confirmed by experimental resuits and the mechanisem of the commom-mode niose reduction is explained using equivalent circuits.

Two Switches Balanced Buck Converter for Common-Mode Noise Reduction

  • Kanjanasopa, Warong;Prempraneerach, Yothin
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2004년도 ICCAS
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    • pp.493-498
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    • 2004
  • The EMI noise source in a switching mode power supply is dominated by a common mode noise. If we can understand the common mode noise occurring mechanism, it is resulted to find out the method to suppress the EMI noise source in the switching mode power supply. The common mode noise is occurring mostly due to circuit is unbalanced which is caused by the capacitive coupling to frame ground, which passes through a heatsink of the switching devices. This research paper presents a new effective balancing method of buck converter circuit by mean of grounding the parasitic and compensation capacitors in correct proportion which is called that the common mode impedance balance (CMIB). The CMIB can be achieved by source, transmission line and termination balanced, such balancing, the common mode current will be cancelled out in the frame ground. The greatly reduced common mode noise can be confirmed by the experimental results.

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An Adaptation Method in Noise Mismatch Conditions for DNN-based Speech Enhancement

  • Xu, Si-Ying;Niu, Tong;Qu, Dan;Long, Xing-Yan
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제12권10호
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    • pp.4930-4951
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    • 2018
  • The deep learning based speech enhancement has shown considerable success. However, it still suffers performance degradation under mismatch conditions. In this paper, an adaptation method is proposed to improve the performance under noise mismatch conditions. Firstly, we advise a noise aware training by supplying identity vectors (i-vectors) as parallel input features to adapt deep neural network (DNN) acoustic models with the target noise. Secondly, given a small amount of adaptation data, the noise-dependent DNN is obtained by using $L_2$ regularization from a noise-independent DNN, and forcing the estimated masks to be close to the unadapted condition. Finally, experiments were carried out on different noise and SNR conditions, and the proposed method has achieved significantly 0.1%-9.6% benefits of STOI, and provided consistent improvement in PESQ and segSNR against the baseline systems.

스위칭 평균 필터를 이용한 임펄스 잡음 제거 (Impulse Noise Removal using Switching Mean Filter)

  • 김국승;김남호
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2009년도 추계학술대회
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    • pp.477-481
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    • 2009
  • 본 논문에서는 영상신호의 전송과정에서 임펄스 잡음에 의해 훼손된 영상의 복원을 위해 스위칭 평균 필터를 제안 하였다. 이 필터는 크기가 다른 두 가지 크기의 잡음 검출 마스크를 이용하여 잡음요소와 비 잡음요소로 구분하고 영상내의 검출된 임펄스 잡음밀도에 따라 스위칭 평균 필터를 통해 임펄스 잡음을 제거한다. 대체된 화소는 다음 화소의 처리과정에서 이웃화소로 사용되어지는 재귀형태와 비재귀형태 갖도록 하였다. 그리고 시뮬레이션을 통해 기존의 방법들과 그 성능을 비교하였다.

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이중 층 파워 메탈구조의 상호 인덕터를 이용한 동시 스위칭 잡음 최소화 기법 (SIMULTANEOUS SWITCHING NOISE MINIMIZATION TECHNIQUE USING DUAL LAYER POWER LINE MUTUAL INDUCTORS)

  • 이용하;강성묵;문규
    • 대한전자공학회논문지SD
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    • 제39권6호
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    • pp.44-50
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    • 2002
  • 동시 스위칭 잡음(SSN: Simultaneous Switching Noise)을 줄이기 위한 새로운 기법을 제안한다. 새롭게 제안하는 구조는 이중 층 파워 라인(DLPL: Dual Layer Power Line) 구조를 이용하여 실리콘 상에 상호 인덕터(mutual inductor)를 구현하여 SSN을 줄일 수 있다. 여기서 제안하는 DLPL은 상호 인덕터가 서로 가깝게 위치하여 커플링(coupling)을 높일 수 있으며 순간적인 많은 전류가 서로 반대 방향으로 동시에 흐르게 하여 두 파워 라인 사이에 상호 인덕턴스를 만들어 내며, 이러한 상호 인덕터는 스위칭 잡음을 줄이는 역할을 한다 SPICE 시뮬레이션을 통해 상호 인덕터의 커플링 계수(coupling coefficient)가 0.8 이상일 경우 이전에 보고된 해결 방안들과 비교할 때 63%까지 스위칭 잡음을 더욱 감소 시킬 수 있었다. 또한 이 DLPL 기법은 PCB 회로설계에」=적용시킬 수 있는 이점을 가지고 있다.

전도성 운전기판을 이용한 다층기판에서의 Simultaneous Switching Noise 감소 기법 (Simultaneous Switching Noise Reduction Technique in Multi-Layer Boards using Conductive Dielectric Substrate)

  • 김성진;전철규;이해영
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 1999년도 추계 기술심포지움 논문집
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    • pp.33-36
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    • 1999
  • In this paper, we proposed a simultaneous switching noise(SSN) reduction technique in muti-layer beards(MLB) for high-speed digital applications and analyzed them using the Finite Difference Time Domain(FDTD) method. The new method by conductive dielectric substrates reduces SSN couplings and resonances, significantly, which cause series malfunctions in the modem high-speed digital applications.

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다구찌 방법을 이용한 A1 배선덕트의 스위칭 유도노이즈 특성에 관한 연구 (-A Study on the Switching Induction Noise Characteristic of A1 wiring Duct Using Taguchi Method-)

  • 홍석묵;박명규
    • 대한안전경영과학회지
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    • 제5권2호
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    • pp.199-214
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    • 2003
  • With the progress of industrial technology, industrial machinery and home appliances have multi-function and high performances by the electronic control technology. Various results are given from the measuring switching induction noise according to environmental condition and its effects cannot be predicted accurately. Therefore, the output results should be analyzed and applied to practical work. To minimize the false operation, Taguchi Method used to solve the quality problem is adopted to analyze the characteristics within the constrained measuring level.

CMOS 그라운드 연결망에서의 최대 동시 스위칭 잡음의 해석 모형 (An Analytical Model of Maximum Simultaneous Switching Noise for Ground Interconnection Networks in CMOS Systems)

  • 김정학;백종흠;김석윤
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제50권3호
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    • pp.115-119
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    • 2001
  • This paper presents an efficient and simple method for analyzine maximum simultaneous switching noise (SSN) on ground interconnection networks in CMOS systems. For the derivation of maximum SSN expression, we use ${\alpha}$-power law MOS model and Taylor's series approximation. The accuracy of the proposed method is verified by comparing the results with those of previous researches and HSPICE simulations under the contemporary process parameters and environmental conditions. The proposed method predicts the maximum SSN values more accurately when compared to existing approaches even in most practical cases such that exist some output drivers not in transition.

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