• Title/Summary/Keyword: Switched biasing

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Low Voltage CMOS LC VCO with Switched Self-Biasing

  • Min, Byung-Hun;Hyun, Seok-Bong;Yu, Hyun-Kyu
    • ETRI Journal
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    • v.31 no.6
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    • pp.755-764
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    • 2009
  • This paper presents a switched self-biasing and a tail current-shaping technique to suppress the 1/f noise from a tail current source in differential cross-coupled inductance-capacitance (LC) voltage-controlled oscillators (VCOs). The proposed LC VCO has an amplitude control characteristic due to the creation of negative feedback for the oscillation waveform amplitude. It is fabricated using a 0.13 ${\mu}m$ CMOS process. The measured phase noise is -117 dBc/Hz at a 1 MHz offset from a 4.85 GHz carrier frequency, while it draws 6.5 mA from a 0.6 V supply voltage. For frequency tuning, process variation, and temperature change, the amplitude change rate of the oscillation waveform in the proposed VCO is 2.1 to 3.2 times smaller than that of an existing VCO with a fixed bias. The measured amplitude change rate of the oscillation waveform for frequency tuning from 4.55 GHz to 5.04 GHz is 131 pV/Hz.

Design of a CMOS Programmable Slew Rate Operational Amplifier with a Switched Parallel Current Subtraction Circuit (병렬전류감산기를 이용한 슬루율 가변 연산증폭기 설계)

  • 신종민;윤광섭
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.5
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    • pp.730-736
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    • 1995
  • This paper presents the design of a CMOS programmable slew rate operational amplifier based upon a newly proposed concept, that is a switched parallel current subtraction circuit with adaptive biasing technique. By utilizing the newly designed circuit, it was proven that slew rate was linearly controlled and power dissipation was optimized. If the programmable slew rate amplifier is employed into mixed signal system, it can furnish the convenience of timing control and optimized power dissipation. Simulated data showed the slew rate ranging from 5. 83V/$\mu$s to 41.4V/$\mu$s, power dissipation ranging from 1.13mW to 4.1mW, and the other circuit performance parameters were proven to be comparable with those of a conventional operational amplifier.

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Design of Multi-Band VCO with Fast AFC Technique (광대역 고속 AFC 기법을 적용한 다중 대역 VCO의 설계)

  • Ahn, Tae-Won;Yoon, Chan-Geun;Lee, Won-Seok;Moon, Yong
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.983-984
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    • 2006
  • Multi-band VCO with fast response adaptive frequency calibration (AFC) technique is designed in 1.8V $0.18{\mu}m$ CMOS process. The possible operation is verified for 5.8GHz band, 5.2GHz band, and 2.4GHz band using the switchable L-C resonators for 802.11a/b/g WLAN applications. To linearize its frequency-voltage gain, optimized multiple MOS varactor biasing technique is used. In order to operate in each band frequency range with reduced VCO gain, 4-bit digitally controlled switched-capacitor bank is used and a wide-range digital logic quadricorrelator is implemented for fast frequency detector.

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Design of Bias Circuit for Measuring the Multi-channel ISFET (다채널 ISFET 측정용 단일 바이어스 회로의 설계)

  • Cho, Byung-Woog;Kim, Young-Jin;Kim, Chang-Soo;Choi, Pyung;Sohn, Byung-Ki
    • Journal of Sensor Science and Technology
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    • v.7 no.1
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    • pp.31-38
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    • 1998
  • Multi-channel sensors can be used to increase the reliability and remove the random iloise in ion-sensitive field effect transistors(ISFETs). Multi-channel sensors is also an essential step toward potential fabrication of sensors for several ionic species in one device. However, when the multi-channel sensors are separately biased, the biasing problems become difficult, that is to say, the bias circuit is needed as many sensors. In this work, a circuit for biasing the four pH-ISFETs in null-balance method, where bias voltages are switched, was proposed. The proposed concept is need only one bias circuit for the four sensors. Therefore it has advantages of smaller size and lower power consumption than the case that all sensors are separately biased at a time. The proposed circuit was tested with discrete devices and its performance was investigated. In the recent trend, sensor systems are implemented as portable systems. So the verified measurement circuit was integrated by using the CMOS circuit. Fortunately, ISFET fabrication process can be compatible with CMOS process. Full circuit has a mask area of $660{\mu}m{\times}500{\mu}m$. In the future, this step will be used for developing the smart sensor system with ISFET.

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Design of CMOS LC VCO with Fast AFC Technique for IEEE 802.11a/b/g Wireless LANs (IEEE 802.11a/b/g 무선 랜을 위한 고속 AFC 기법의 CMOS LC VCO의 설계)

  • Ahn Tae-Won;Yoon Chan-Geun;Moon Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.9 s.351
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    • pp.17-22
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    • 2006
  • CMOS LC VCO with fast response adaptive frequency calibration (AFC) technique for IEEE 802.11a/b/g WLANs is designed in 1.8V $0.18{\mu}m$ CMOS process. The possible operation is verified for 5.8GHz band, 5.2GHz band, and 2.4GHz band using the switchable L-C resonators. To linearize its frequency-voltage gain (Kvco), optimized multiple MOS varactor biasing tecknique is used. In order to operate in each band frequency range with reduced VCO gain, 4-bit digitally controlled switched- capacitor bank is used and a wide-range digital logic quadricorrelator (WDLQ) is implemented for fast frequency detector.