• Journal of Power Electronics
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• v.8 no.1
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• pp.35-50
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• 2008

A zero-voltage-transition (ZVT) pulse width modulated (PWM) converter is a PWM converter with a single main power switch that has an auxiliary circuit to help it turn on with zero-voltage switching (ZVS). There have been many ZVT-PWM converters proposed in the literature as they are the most popular type of ZVS-PWM converters. In this paper, the properties and characteristics of several types of ZVT-PWM converters are reviewed. A new type of ZVT-PWM converter is then introduced, and the operation of a sample converter of this type is explained and analyzed in detail. A procedure for the design of the converter is presented and demonstrated experimentally. The feasibility of the new converter is confirmed with results obtained from an experimental prototype. Conclusions on the performance of ZVT-PWM converters in general are made based on the efficiency results obtained from the experimental prototypes of various ZVT-PWM converters of different types.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.54 no.4
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• pp.171-178
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• 2005

The proposed dual-output DC-DC converter that bases on flyback converter can obtain two output voltage with non-isolated main-output and isolated sub-output at the same time using single-winding high frequency transformer. It can solve problems in multi-winding converter that use one main-switch, and also control quality of isolated sub-output voltage can be improved by additional sub-switch to the second. For analysis and design of the proposed converter system, converters are classified as operation mode from switching state and are become modeling by applying state space averaging method. Steady-state characteristics and dynamic characteristics are analyzed by DC component and perturbation component from state space averaging model. From experiment converter, validity of analysis and design for the propose converter system is confirm.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2736-2738
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• 1999

Power electronic loads inject harmonic currents into the utility system. The large increase of power consumption will inevitably lead to deteriorating power quality due to the popularization of switch-mode power electronic equipment. In this paper, a periodic voltage is injected in the control circuit to vary duty cycle of the rectifier switch within a line cycle so that the fifth-order harmonic of the input current is reduced to meet the IEC 61000-3-2 requirement. Experimental results are presented to confirm the validity of this method.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.133-136
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• 2002

This paper discusses the design of a sample-and -hold amplifier(SHA) that has a 12-bit resolution with a 100 MS/s speed. The sample-and-hold amplifier uses the open-loop architecture with hold-mode feedthrough cancellation for high accuracy and high sampling speed. The designed SHA is composed of input buffer, sampling switch, and output buffer with additional amplifier for offset cancellation Hard Ware. The input buffer is implemented with folded-cascode type operational transconductance Amplifier(OTA), and sampling switch is implemented with switched source follower(SSF). A spurious free dynamic range (SFDR) of this circuit is 72.6 dB al 100 MS/s. Input signal dynamic range is 1 Vpp differential. Power consumption is 65 ㎽.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.36T no.4
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• pp.82-87
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• 1999

The Asynchronous Transfer Mode(ATM) networks are being adopted as backbones over various parts of Internet. TCP is one of the most widespread transport protocols and can be used with ATM. But, TCP shows poor end-to-end performance on ATM networks. Effective throughput of TCP over ATM can be quite low when cells are dropped at the congested ATM switch. As congested link transmits cells from corrupted packets, it wastes bandwidth and throughput becomes low. This paper examines the behavior of TCP over ATM-UBR using EPD switch in a broadband environment. As threshold value closes to the buffer size, the buffer can be used more efficiently, but more drops and retransmission occur. If the threshold value is much less than buffer size, efficiency becomes low, but few drops can be happen. Therefore, the decision of threshold value becomes important factor.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.4
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• pp.79-86
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• 1997

An electro-optic polymer digital optical switch with rib waveguides is designed and fabricated by using the RIE method. POlarization-independent and wavelength-insensitive operation is demonstrated at the wavelengths of 1.3mm and 1.55mm, for the first time in electro-optic polymer-based devices. The rib waveguides have been designed to achieve good guiding properites for both TE and TM polarizations by controlling the etching depth as well as its aspect ratio. Especially theetching depth is controlled to change the guided mode profiles of the rib waveguide and thus to achieve an optimum coupling in the branch. The measured crosstalk is better than -16dB and the extincton ratio of each output port is greater than 16dB.

• Journal of Korean Institute of Industrial Engineers
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• v.19 no.1
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• pp.47-59
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• 1993

Recently, Broadband ISDN(B-ISDN) has received increased attention as a communication architecture which can support multimedia applications. Also, Asynchronous Transfer Mode(ATM) is considered as a promising technique to transfer and switch various kinds of media, such as telephone speech, data and motion video. Comparisons among a variety of ATM switching systems which have already been proposed will provide quite useful information for the new ATM switching system design. To facilitate the comparison, we introduce the design requirements and classification criteria for the ATM switch, and propose a performance analysis model for the Banyan network which is the basic switching fabric of most multi-stage ATM switching systems. The model is based on the standard discrete-time Markov chain analysis and can be conveniently used for extensive Banyan network analysis. The computational results are also presented.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.993-997
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• 1998

This paper presents a two-switch boost chopper with a sinewave current shaping and power factor correction scheme, which is applied for driving electronic ballast using high frequency resonant inverter. A working principle of the proposed one-converter type electronic ballast with power factor correction and active filtering schemes is described on the bases of the equivalent circuit of each operation mode, together with operation analysis. The steady-state performance evaluations of this electronic ballast are illustrated and discussed in experiment.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.2
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• pp.170-175
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• 2000

A new quasi-parallel resonant DC link inverter is proposed for three phase soft switching application. By i inserting only one additional switch, the proposed inverter excludes both voltage stresses and restricted PWM p problems, which are demerits of the conventional resonant inverter. In this paper, the circuit operations are e explained in detail using the operational mode analysis of the proposed inverter and design methods of the r resonant components are suggest('x:l. Lastly, the applicable possibility of the proposed inverter is vel예fied t through the experimental results.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2004.05a
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• pp.526-529
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• 2004

A new SEPIC-Flyback convater is proposed. The proposed converter is the superposition of SEPIC and Flyback converter. Not only SEPIC output but also Flyback output could be fully regulated by constant frequency PWM control. Merged SEPIC and Flyback topology could share the transformer and power MOSFET. When the switch turns of one topology operates via capacitive energy transfer. Another topology acts as powering mode while the switch is off. So, it could increase power falsify per one cycle. The operating principle of the proposed converter is described below. Prototype featuring 24V input 48V output, 100kHz switching frequency, and 100W output is simulated under the proposed topology.