• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 춘계학술대회 논문집 전자세라믹스 센서 및 박막재료 반도체재료 일렉트렛트 및 응용기술
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• pp.126-129
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• 2000

This paper describes on the fabrication of a SOI substrate by SDB technology and electrochemical etch-stop. The surface of the thinned SDB SOI substrate is more uniform than that of grinding or polishing by mechanical method, and this process was found to be very accurate method for SOI thickness control. During electrochemical etch-stop, leakage current versus voltage curves were measured for analysis of the open current potential (OCP) point, the passivation potential (PP) point and anodic passivation potential. The surface roughness and the controlled thickness selectivity of the fabricated a SDB SOI substrate were evaluated by using AFM and SEM, respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 영호남학술대회 논문집
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• pp.301-306
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• 2000

This paper describes on the fabrication of a SOI substrate by SDB technology and electrochemical etch-stop. The surface of the thinned SDB SOI substrate is more uniform than that of grinding or polishing by mechanical method, and this process was found to be a very accurate method for SOI thickness control. During electrochemical etch-stop, leakage current versus voltage curves were measured for analysis of the open current potential(OCP) point, the passivation potential(PP) point and anodic passivation potential. The surface roughness and the controlled thickness selectivity of the fabricated a SDB SOI substrate were evaluated by using AFM and SEM, respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.245-245
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• 2010

This paper and the rear passivation experiment was local back surface field Nd:$YVO_4$ green laser and the experiment was used performed to screen printing. Laser power 100%, with a fixed frequency for 60kHz Current of 29A and 30A were tested in two conditions. The point contact distances of 0.2mm, 0.4mm, 0.6mm, 0.8mm and 29A and 30A current conditions, it was found that is suitable for 0.4mm.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제41회 하계 정기 학술대회 초록집
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• pp.72-72
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• 2011

Surface science is intrinsically related to the performance of solar cells. In solar cells the generation and collection of charge carriers determines their efficiency. Effective transport of charge carriers across interfaces and minimization of their recombination at surfaces and interfaces is of utmost importance. Thus, the chemistry at the surfaces and interfaces of these devices must be determined, and related to their performance. In this talk we will discuss the role of two important interfaces, First, the role of surface passivation is very important in limiting the rate of carrier of recombination. Here we will combine x-ray photoelectron spectroscopy of the surface of a Si device with electrical measurements to ascertain what factors determine the quality of a solar cell passivation. In addition, the quality of the heterojunction interface in a ZnSe/CdTe solar cell affects the output voltage of this device. X-ray photoelectron spectroscopy gives some insight into the composition of the interface, while ultraviolet photoemission yields the relative energy of the two materials' valence bands at the junction, which controls the open circuit voltage of the solar cell. The relative energies of ZnSe and CdTe at the interface is directly affected by the material quality of the interface through processing.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1997년도 추계학술대회 논문집
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• pp.413-417
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• 1997

In this study, chlorine(Cl)-based gas chemistry is generally used to etching for AlCu films metallization. The corrosion phenomena of AlCu films were examined with XPS (X-ray photoelectron spectroscopy), SEM (Scanning electron microscopy), and TEM (Transmission electron microscopy). SF$\sub$6/ plasma treatment subsequent to the etch process prevents the corrosion effectively in the pressure of 300 mTorr. It is found that the chlorine atoms on the etched surface are not substituted for fluorine atoms during SF$\sub$6/ treatment, but a passivation layer on the surface by fluorine-related compounds would be formed. The passivation layer prevents the moisture penetration on the SF$\sub$6/ treated surface and suppresses the corrosion successfully.

• 한국전기전자재료학회논문지
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• 제13권5호
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• pp.431-436
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• 2000

This paper describes on the fabrication of a SOI substrate by SDB technology and electrochemical etch-stop. The surface of the thinned SDB SOI substrate is more uniform than that of grinding or polishing by mechanical method and this process was found to be a very accurate method for SOI thickness control. During electrochemical etch-stop leakage current versus voltage curves were measured for analysis of the open current potential(OCP) point the passivation potential(PP) point and anodic passivation potential. The surface roughness and the controlled thickness selectivity of the fabricated a SDB SOI substrate were evaluated by using AFM and SEM respectively.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제55권1호
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• pp.34-39
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• 2006

In high-voltage devices such as thyristor, beveling is mostly used junction termination method to reduce the surface electric field far below the bulk electric field and to expand the depletion region thus that breakdown occurs in the bulk of the device rather than at the surface. However, coating material used to protect the surface of the device contain so many charges which affect the electrical characteristics of the device. And device reliability is also affected by this charge. Therefore, it is needed to analyze the effect of surface charge on electrical characteristics of the device. In this paper, we analyzed the breakdown voltage and leakage current characteristics of the thyristor as a function of the amount of surface charge density. Two dimensional process simulator ATHENA and two-dimensional device simulator ATLAS is used to analyze the surface charge effects.

• 한국표면공학회지
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• 제57권3호
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• pp.140-154
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• 2024

As the trend towards miniaturization in semiconductor integration process, the limitations of interconnection metals such as copper, tungsten have become apparent, prompting research into the emergence of new materials like cobalt and emphasizing the importance of studying the corresponding process conditions. During the chemical mechanical polishing (CMP) process, corrosion inhibitors are added to the slurry, forming passivation layers on the cobalt surface, thereby playing a crucial role in controlling the dissolution rate of the metal surface, enhancing both removal rate and selectivity. This review investigates the understanding of the cobalt polishing process and examines the characteristics and behavior of corrosion inhibitors, a type of slurry additive, on the cobalt surface. Among the corrosion inhibitors examined, benzotriazole (BTA), 1,2,4-triazole (TAZ), and potassium oleate (PO) all improved surface characteristics through their interaction with cobalt. These findings provide important guidelines for selecting corrosion inhibitors to optimize CMP processes for cobalt-based semiconductor materials. Future research should explore combinations of various corrosion inhibitors and the development of new compounds to further enhance the efficiency of semiconductor processes.

• 한국진공학회:학술대회논문집
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• 한국진공학회 1995년도 제9회 학술발표회 논문개요집
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• pp.105-106
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• 1995

• 한국재료학회지
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• 제20권4호
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• pp.210-216
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• 2010

This paper investigates the dependence of a-Si:H/c-Si passivation and heterojunction solar cell performances on various cleaning processes of silicon wafers. It is observed that the passivation quality of a-Si:H thin-films on c-Si wafers depends highly on the initial H-termination properties of the wafer surface. The effective minority carrier lifetime (MCLT) of highly H-terminated wafer is beneficial for obtaining high quality passivation of a-Si:H/c-Si. The wafers passivated by p(n)-doped a-Si:H layers have low MCLT regardless of the initial H-termination quality. On the other hand, the MCLT of wafers incorporating intrinsic (i) a-Si:H as a passivation layer shows sensitive variation with initial cleaning and H-termination schemes. By applying the improved cleaning processes, we can obtain an MCLT of $100{\mu}sec$ after H-termination and above $600{\mu}sec$ after i a-Si:H thin film deposition. By adapting improved cleaning processes and by improving passivation and doped layers, we can fabricate a-Si:H/c-Si heterojunction solar cells with an active area conversion efficiency of 18.42%, which cells have an open circuit voltage of 0.670V, short circuit current of $37.31\;mA/cm^2$ and fill factor of 0.7374. These cells show more than 20% pseudo efficiency measured by Suns-$V_{oc}$ with an elimination of series resistance.