• Proceedings of the IEEK Conference
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• summer
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• pp.325-329
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• 2004

Linear size expanders have been studied in many fields for the practical use, which is possibility to connect large numbers of device chips in parallel communication systems. One major limitation on the efficiency of parallel computer designs has been the prohibitively high cost of parallel communication between processors and memories. Linear size expanders can be used to construct theoretically optimal interconnection networks. In current, the defined constructions have large constant factors, thus rendering them impractical for reasonable sized networks. This paper presents an improvement on constructing concentrators using an $(n,\;k,\;2rs/(r^2-s^2))expander,$ which realizes the reduction of the size in a superconcentrator by a constant factor.

• The Journal of the Korea Contents Association
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• v.5 no.1
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• pp.179-187
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• 2005

Linear order Concentrators and Superconcentrators have been studied extensively for their ability to interconnect large numbers of devices in parallel, whether in communication systems or in parallel computers. One major limitation on the efficiency of parallel computer designs has been the prohibitively high cost of parallel communication between processors and memories. Linear order concentrators, O(n), can be used to construct theoretically optimal interconnection network schemes. Existing explicitly the defined constructions are based on expanders, which have large constant factors, thereby rendering them impractical lot reasonable sized networks. It demands the construction of concentrator which uses the expander with the smaller expansion constant. This paper introduces an improvement on the method of constructing concentrators using expanders, which reduce the size of resulting concentrator built from any given expander by a constant factor.

• The Transactions of the Korea Information Processing Society
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• v.5 no.1
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• pp.40-48
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• 1998

Linear size expanders have been studied in many fields for the practical use, which make it possible to connect large numbers of device chips in both parallel communication systems and parallel computers. One major limitation on the efficiency of parallel computer designs has been the highly cost of parallel communication between processors and memories. Linear order concentrators can be used to construct theoretically optimal interconnection network schemes. Existing explicitly defined constructions are based on expanders, which have large constant factors, thereby rendering them impractical for reasonable sized networks. For these objectives, we use the more detailed matching points in permutation functions, to find out the bigger expansion constant from an equation, $\mid\Gamma_x\mid\geq[1+d(1-\midX\mid/n)]\midX\mid$. This paper presents an improvement of expansion constant on constructing concentrators using expanders, which realizes the reduction of the size in a superconcentrator by a constant factor. As a result, this paper shows an explicit construction of (n, 5, $1-\sqrt{3/2}$) expander. Thus, superconcentrators with 209n edges can be obtained by applying to the expanders of Gabber and Galil's construction.

• Journal of Korea Multimedia Society
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• v.3 no.6
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• pp.674-684
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• 2000

One key obstacle which has been identified in achieving parallel processing is to communicate effectively between processors during execution. One approach to achieving an optimal delay time is to use expander graph. The networks and algorithms which are based on expander graphs are successfully exploited to yield fast parallel algorithms and efficient design. The AKS sorting algorithm in time O(logN) which is an important result is based on the use of expanders. The expander graph also can be applied to construct a concentrator and a superconcentrator. Since Margulis found a way to construct an explicit linear expander graph, several expander graphs have been developed. But the proof of existence of such graphs is in fact provided by a nonconstructive argument. We investigate the expander network on the hypercube network. We prove the expansion of a sin81e stage hypercube network and extend this from a single stage to multistage networks. The results in this paper provide a theoretical analysis of expansion in the hypercube network.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.2
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• pp.50-57
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• 1998

In this paper, we propoe a log N-stage ATM concentator. ATM concentrator is used in the ATM access network to concentrate the traffic offered at UNI, so that high utilization of the newtork rewources is achieved. The concetrator may be used as a construction block in the design of ATM switch. We define abasic element, named equalizer, and decribe its function and theory to construct an efficient concentrator using the element. In addition, a control scheme to enhance the concentrator to a superconcentrator is presented, which enables the concentration to start from an arbitrary output. This scheme makes it possible to construct an efficient ditributior or a barrel shifter which are often used in ATM switch and other application. The proposed concentrator has a low hardware complexity of O(N log N), thus it is economical to implement. Also, the time complexity of proposed concentrator for determining the rouging is O(N log N), which is faster than that of the existing ones.