• Journal of the Korean Society of Fisheries and Ocean Technology
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• v.23 no.1
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• pp.6-10
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• 1987

The authors carried out an experiment to measure the hydrodynamic resistance of the gear and the efficiency of otter board of the midwater trawl, which is the same used in the former experiment in this series of studies. The whole resistance of the gear was measured by a 10 ton scale recording tension meter, and they were analyzed into the shearing force and the drag with relevant factors determined in the former experiments. The results obtained can be summarized as follows: 1. The whole drag of gear T(kg) and the drag of net R sub(N) (kg) can be expressed as T=2.15 v super(1.12). R sub(N)=1.96 v super(1.01) (v: towing speed in m/sec) 2. The formula of estimating the drag of net deduced by Koyama's method can be expressed as R sub(N)=4.3$\times$d/l$\times$abv 3. The shearing force and the drag of otter board is about 19 to 22% and 5 to 7% of the drag of net, respectively. Whereas, the shearing coefficient and the drag coefficient calculated by the resistance and the opening of gear are 1.5 and 0.42, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.11B
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• pp.1373-1382
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• 2011

Zigbee is communication technology most ideal because Zigbee support low power communication and wide expansion in wireless home network. However, Zigbee is not popular, because of Zigbee always has Hidden Node Problem and Transit Delay Problem. We propose new Beacon Frame structure to solve the two problem in Zigbee. New Beacon Frame structure reduces a Super Frame Duration and add a same space of a Control Frame Duration. We expect to solved method of Hidden Node Problem that exchange terminal information to using RTS/CTS. Also, We expect to solved method of Transit Delay Problem that put Beacon between Control Frame Duration and Super Frame Duration for synchronization. We confirm new Beacon Frame to solved two problem in OPNET simulation at Zigbee QoS Parameters. We measure Delay(sec) for solution degree of Transit Delay Problem, and measure Throughput(bits/sec) and Load (bits/sec) for solution degree of Hidden Node Problem.

• Wind and Structures
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• v.18 no.6
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• pp.693-715
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• 2014

Stochastic processes are used to represent phenomena in many diverse fields. Numerical simulation method is widely applied for the solution to stochastic problems of complex structures when alternative analytical methods are not applicable. In some practical applications the stochastic processes show non-Gaussian properties. When the stochastic processes deviate significantly from Gaussian, techniques for their accurate simulation must be available. The various existing simulation methods of non-Gaussian stochastic processes generally can only simulate super-Gaussian stochastic processes with the high-peak characteristics. And these methodologies are usually complicated and time consuming, not sufficiently intuitive. By revealing the inherent coupling effect of the phase and amplitude part of discrete Fourier representation of random time series on the non-Gaussian features (such as skewness and kurtosis) through theoretical analysis and simulation experiments, this paper presents a novel approach for the simulation of non-Gaussian stochastic processes with the prescribed amplitude probability density function (PDF) and power spectral density (PSD) by amplitude modulation and phase reconstruction. As compared to previous spectral representation method using phase modulation to obtain a non-Gaussian amplitude distribution, this non-Gaussian phase reconstruction strategy is more straightforward and efficient, capable of simulating both super-Gaussian and sub-Gaussian stochastic processes. Another attractive feature of the method is that the whole process can be implemented efficiently using the Fast Fourier Transform. Cases studies demonstrate the efficiency and accuracy of the proposed algorithm.

• Journal of the Computational Structural Engineering Institute of Korea
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• v.15 no.2
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• pp.351-365
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• 2002

The box system that is composed only of reinforced concrete walls and slabs we adopted on many high-rise apartment buildings recently constructed in Korea. And the framed structure with shear wall core that can effectively resist horizontal forces is frequently adopted for the structural system for high-rise building structures. In these structures, a shear wall may have one or more openings for functional reasons. It is necessary to use subdivided finite elements for accurate analysis of the shear wall with openings. But it would take significant amount of computational time and memory if the entire building structure is subdivided into a finer mesh. An efficient analysis method that can be used regardless of the number, size and location of openings is proposed in this study. The analysis method uses super element, substructure, matrix condensation technique and fictitious beam technique. Three-dimensional analyses of the box system and the framed structure with shear wall core having various types of openings were performed to verify the efficiency of the proposed method. It was confirmed that the proposed method have outstanding accuracy with drastically reduced time and computer memory from the analyses of example structures.

• Journal of the Computational Structural Engineering Institute of Korea
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• v.15 no.2
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• pp.237-249
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• 2002

The wall system that is composed only of reinforced concrete walls and slabs is adopted on many high-rise apartment buildings recently constructed. In the apartment buildings, a shear wall may have one or mote openings for functional reasons. Many researches on the analysis of shear wall with openings were performed. But, some restrictions prevent those research results being applied to practical analysis and design procedure. It is necessary to use subdivided finite elements lot accurate analysis of the wall system with openings. But it would cost tremendous amount of analysis time and computer memory if the entire building structure is subdivided into a finer mesh. An efficient analysis method which can be used regardless of the number, size and location of openings is proposed in this study. The analysis method uses super element, matrix condensation technique and fictitious beam technique. Analyses of example structures having various types of openings were performed to verify the efficiency of proposed method. It was confirmed that the proposed method have outstanding accuracy with drastically reduced time and computer memory from the analyses of example structures.

• Korean Journal of Fisheries and Aquatic Sciences
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• v.20 no.6
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• pp.484-488
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• 1987

The model experiments were performed in tile circular water tank on the simple cambered and the super-V otter boards attached with the slotted fowler flap at the trailing edge in order to develop more efficient shearing characteristics. The dimension of the model otter boards was varied slightly in the flap chord ratio $0.20\~0.22$ and in the area $432\~426cm^2$ in accordance with the flap angle $30\~50^{\circ}$. The maximum shearing coefficient $C_L=1.78$ and hydrodynamic efficiency $C_L/C_D=4.0$ in the superV type were higher than their efficiencies $C_L=1.75$ and $C_L/C_D=3.7$ in the simple cambered type. As the shearing forces of the otter boards with flap were increased $20\~30\%$ mere than these without flap in spite of increasing the drag and the instability. The effect of flap should be fully investigated for the application.

• Korean Journal of Materials Research
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• v.23 no.10
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• pp.550-554
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• 2013

As continued scaling becomes increasingly difficult, 3D integration has emerged as a viable solution to achieve higher bandwidths and good power efficiency. 3D integration can be defined as a technology involving the stacking of multiple processed wafers containing integrated circuits on top of each other with vertical interconnects between the wafers. This type of 3D structure can improve performance levels, enable the integration of devices with incompatible process flows, and reduce form factors. Through silicon vias (TSVs), which directly connect stacked structures die-to-die, are an enabling technology for future 3D integrated systems. TSVs filled with copper using an electro-plating method are investigated in this study. DC and pulses are used as a current source for the electro-plating process as a means of via filling. A TiN barrier and Ru seed layers are deposited by plasma-enhanced atomic layer deposition (PEALD) with thicknesses of 10 and 30 nm, respectively. All samples electroplated by the DC current showed defects, even with additives. However, the samples electroplated by the pulse current showed defect-free super-filled via structures. The optimized condition for defect-free bottom-up super-filling was established by adjusting the additive concentrations in the basic plating solution of copper sulfate. The optimized concentrations of JGB and SPS were found to be 10 and 20 ppm, respectively.

• Journal of Electrical Engineering and Technology
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• v.13 no.5
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• pp.1886-1900
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• 2018

This paper proposes a confronting feedback control structure and controllers for positive output elementary super lift Luo converters (POESLLCs) working in discontinuous conduction mode (DCM). The POESLLC offers the merits like high voltage transfer gain, good efficiency, and minimized coil current and capacitor voltage ripples. The POESLLC working in DCM holds the value of not having right half pole zero (RHPZ) in their control to output transfer function unlike continuous conduction mode (CCM). Also the DCM bestows superlative dynamic response, eliminates the reverse recovery troubles of diode and retains the stability. The proposed control structure involves two controllers respectively to control the voltage (outer) loop and the current (inner) loop to confront the time-varying ON/OFF characteristics of variable structured systems (VSSs) like POESLLC. This study involves two different combination of feedback controllers viz. the proportional integral controller (PIC) plus sliding mode controller (SMC) and the fuzzy logic controller (FLC) plus SMC. The state space averaging modeling of POESLLC in DCM is reviewed first, then design of PIC, FLC and SMC are detailed. The performance of developed controller combinations is studied at different working states of the POESLLC system by MATLAB-Simulink implementation. Further the experimental corroboration is done through implementation of the developed controllers in PIC 16F877A processor. The prototype uses IRF250 MOSFET, IR2110 driver and UF5408 diodes. The results reassured the proficiency of designed FLC plus SMC combination over its counterpart PIC plus SMC.

• Resources Recycling
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• v.18 no.6
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• pp.10-17
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• 2009

Degradation of the organic component in the waste were carried out by superheated steam in a pressurized vessel. The effects of waste characteristics, reaction temperature and residence time on the degradation rate have been determined. The biodegradable organic components such as food and paper waste have been degraded, and plastics, wood and metal were remained without degradation. The degradation efficiency is decided by the desizing rate of the waste, and the waste mixture with 23% biodegradable organic component shows higher desizing rate than that of the 43% of the biodegradable organic component in a short residence time and the desizing rate is found to be 90% in the maximum condition.

• The KIPS Transactions:PartD
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• v.17D no.6
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• pp.383-394
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• 2010

Flash memory based SSDs are currently being considered as a promising candidate for replacing hard disks due to several superior features such as shorter access time, lower power consumption and better shock resistance. However, SSDs have different characteristics from hard disk such as difference of unit and time for read, write and erase operation and impossibility for over-writing. Because of these reasons, SSDs have disadvantages on hard disk based systems, so FTL(Flash Translation Layer) is designed to increase SSDs' efficiency. In this paper, we propose an advanced logical address mapping method for increasing SSDs' performance, which is named HAMM(Hybrid Address Mapping Method). HAMM addresses drawbacks of previous block-mapping method and super-block-mapping method and takes advantages of them. We experimented our method on our own SSDs simulator. In the experiments, we confirmed that HAMM uses storage area more efficiently than super-block-mapping method, given the same buffer size. In addition, HAMM used smaller memory than block-mapping method to construct mapping table, demonstrating almost same performance.