• 제목/요약/키워드: Substrate bias voltage

검색결과 270건 처리시간 0.023초

ISL 게이트에서 측정과 시뮬레이션의 결과 비교 (The Results Comparison of Measurement and Simulations in ISL(Integrated Schottky Logic) Gate)

  • 이용재
    • 한국정보통신학회논문지
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    • 제5권1호
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    • pp.157-165
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    • 2001
  • 집적 쇼트키 논리 게이트에서 전압 스윙을 크게 하기 위해서 백금 실리사이드 쇼트키 접합의 전기직 특성을 분석하였고, 이 접합에서 프로그램으로 특성을 시뮬레이션 하였다. 분석특성 특성을 위한 시뮬레이션 프로그램은 제조 공정용 SUPREM V와 모델링용 Matlab, 소자 구조용의 Medichi 툴이다. 시뮬레이션 특성을 위한 입력 파라미터는 소자 제작 공정의 공정 단계와 동일한 조건으로 하였다. 분석적인 전기적인 특성들은 순방향 바이어스에서 턴-온 전압, 포화 전류, 이상인자이고, 역방향 바이어스에서 항복 전압을 실제 특성과 시뮬레이션 특성 사이의 결과를 보였다. 결과로써 순방향 턴-온 전압, 역방향 항복전압, 장벽 높이는 기판의 증가된 농도의 변화에 따라 감소되었지만, 포화전류와 이상인자는 증가되었다.

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새로운 구조의 나노급 ESD 보호소자 설계 및 제작에 관한 연구 (A Study on the Novel SCR NANO ESD Protection Device Design and fabrication)

  • 김귀동;이조운;박상조;이윤식;구용서
    • 전기전자학회논문지
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    • 제9권2호
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    • pp.161-169
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    • 2005
  • 본 연구에서는 보다 낮은 트리거 전압을 갖는 새로운 구조의 LVTSCR과 Triple-well SCR ESD 보호회로를 제안 및 설계하여 나노급 회로에 적용하고자 하였다. 제안된 LVTSCR은 약 9V, 약 7mA의 트리거 전압과 전류 및 약 7mA의 홀딩전압 특성을 가지며, 0.8KV(150mA/um) 정도의 ESD 감내 특성을 나타낸다. 한편 Triple-well SCR은 6V, 40mA의 트리거 전압을 가지며, substrate 및 gate 바이어스에 의해 트리거 전압이 4-5.5V 까지 감소하였다.

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고내식성의 신 마그네슘 코팅막 제작 (Preparation of New Corrosive Resistive Magnesium Coating Films)

  • 이명훈
    • Journal of Advanced Marine Engineering and Technology
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    • 제20권5호
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    • pp.103-113
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    • 1996
  • The properties of the deposited film depend on the deposition condition and these, in turn depend critically on the morphology and crystal orientation of the films. Therefore, it is important to clarify the nucleation occurrence and growth stage of the morphology and orientation of the film affected by deposition parameters, e.g. the gas pressure and bias voltage etc. In this work, magnesium thin flims were prepared on cold-rolled steel substrates by a thermo-eletron activation ion plating technique. The influence of nitrogen gas pressure and substrate bias voltage on their crystal orientation and morphology of the coated films were investigated by scanning electron microscopy (SEM) and X-ray diffraction, respectively. The diffraction peaks of magnesium film became less sharp and broadened with the increase of nitrogen gas pressure. With an increase in nitrogen gas pressure, flim morphology changed from colum nar to granular structure, and surface crystal grain-size decreased. The morphology of films depended not only on gas pressure but also on bias voltage, i.e., the effect of increasing bias voltage was similar to that of decreasing gas pressure. The effect of crystal orientation and morphology of magnesium films on corrosion behaviors was estimated by measuring anodic polarization curves in deaerated 3%NaCl solution. Magnesium, in general, has not a good corrosion resistance in all environments. However, these magnesium films prepared by changing nitrogen gas pressure showed good corrosion resistance. Among the films, magnesium films which exhibited granular structure had the highest corrosion resistance. The above phenomena can be explained by applying the effects of adsorption, occlusion and ion sputter of nitrogen gas.

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진공조의 잔류산소가 입방정질화붕소 박막 합성에 미치는 영향 (Effect of Residual Oxygen in a Vacuum Chamber on the Deposition of Cubic Boron Nitride Thin Film)

  • 오승근;김영만
    • 한국표면공학회지
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    • 제46권4호
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    • pp.139-144
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    • 2013
  • c-BN(cubic boron nitride) is known to have extremely high hardness next to diamond, as well as very high thermal and chemical stability. The c-BN in the form of film is useful for wear resistant coatings where the application of diamond film is restricted. However, there is less practical application because of difficult control of processing variables for synthesis of c-BN film as well as unclear mechanism on formation of c-BN. Therefore, in the present study, the structural characterization of c-BN thin film were investigated using $B_4C$ target in r.f. magnetron sputtering system as a function of processing variables. c-BN films were coated on Si(100) substrate using $B_4C$ (99.5% purity). The mixture of nitrogen and argon was used for carrier gas. The deposition processing conditions were changed with substrate bias voltage, substrate temperature and base pressure. Fourier transform infrared microscopy (FT-IR) and X-ray photoelectron spectroscopy (XPS) were used to analyze crystal structures and chemical binding energy of the films. In the case of the BN film deposited at room temperature, c-BN was formed in the substrate bias voltage range of -400 V~ -600 V. Less c-BN fraction was observed as deposition temperature increased and more c-BN fraction was observed as base pressure increased.

Sputter 기반의 활성입자빔 증착장비를 이용한 a-C 박막 증착특성 (The depositing characteristics of amorphous carbon thin films by a reactive particle beam assisted sputtering process)

  • 이태훈;신유철;권광호
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.123-123
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    • 2008
  • In this work, amorphous carbon thin films were deposited for hard mask applications by a reactive particle beam (RPB) assisted sputtering system at room temperature. The depositing characteristics of the films were investigated as functions of operating parameters such as reflector bias voltage and RF plasma power. It was confirmed that the deposition rate increased with increasing the reflector bias voltage and RF plasma power. By an atomic force microscope (AFM), it was revealed that the surface roughness was also increased. The total stress in films was determined by the use of the substrate curvature and its result will be discussed.

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장파장 OEIC의 제작 및 특성 (Fabrication and Characteristics of Long Wavelength Receiver OEIC)

  • 박기성
    • 한국광학회:학술대회논문집
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    • 한국광학회 1991년도 제6회 파동 및 레이저 학술발표회 Prodeedings of 6th Conference on Waves and Lasers
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    • pp.190-193
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    • 1991
  • The monolithically integrated receiver OEIC using InGaAs/InP PIN PD, junction FET's and bias resistor has been fabricated on semi-insulating InP substrate. The fabrication process is highly compatible between PD and self-aligned JFET, and reduction in gate length is achieved using an anisotropic selective etching and a non-planar OMVPE process. The PIN photodetector with a 80 ${\mu}{\textrm}{m}$ diameter exhibits current of less than 5 nA and a capacitance of about 0.35 pF at -5 V bias voltage. An extrinsic transconductance and a gate-source capacitance of the JFET with 4 ${\mu}{\textrm}{m}$ gate length (gate width = 150 ${\mu}{\textrm}{m}$) are typically 45 mS/mm and 0.67 pF at 0 V, respectively. A voltage gain of the pre-amplifier is 5.5.

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Influence of Deposition Conditions on the Adhesion of Sputter-deposited MoS$_2$-Ti Films

  • Kim, Sun-Kyu;Yongliang Li
    • 한국표면공학회지
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    • 제37권1호
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    • pp.1-4
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    • 2004
  • MoS$_2$-Ti films were deposited on SKD-11 tool steel substrate by a D.C. magnetron sputtering system. The influence of deposition parameters on the adhesion of the films was investigated by the scratch test. Crosssection morphology was evaluated using FE-SEM. The plasma etching played an important role on the adhesion of the films. The appropriate etching conditions roughened the surface, resulting In the improved adhesion of the film. The adhesion of the film increased with the interlayer thickness up to 110 nm and then decreased slightly with further increasing of interlayer thickness. The adhesion was highest at a bias voltage of -50 V. Further increase of the bias voltage decreased the film adhesion.

ZnO 스퍼터링에서 기판전압의 변화에 의한 성장 조절 (Control of ZnO Sputtering Growth by Changing Substrate Bias Voltage)

  • ;최재원;전원진;조중열
    • 반도체디스플레이기술학회지
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    • 제16권2호
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    • pp.94-97
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    • 2017
  • Amorphous Si has been used for data processing circuits in flat panel displays. However, low mobility of the amorphous Si is a limiting factor for the data transmission speed. Metal oxides such as ZnO have been studied to replace the amorphous Si. ZnO is a wide bandgap (3.3 eV) semiconductor with high mobility and good optical transparency. When ZnO is grown by sputtering with $O_2$ as an oxidizer, there can be many ion species arising from $O_2$ decomposition. $O^+$, $O_2{^+}$, and $O^-$ ions are expected to be the most abundant species, and it is not clear which one contributes to the ZnO growth. We applied alternating substrate voltage (0 V and -70 V) during sputtering growth. We studied changes in transistor characteristics induced by the voltage switching. We also compared ZnO grown by dc and rf sputtering. ZnO film was grown at $450^{\circ}C$ substrate temperature. ZnO thin-film transistor grown with these methods showed $7.5cm^2/Vsec$ mobility, $10^6$ on-off ratio, and -2 V threshold voltage.

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RF 마그네트론 스퍼터링에 의해 저온 증착한 $SrTiO_3$ 박막의 전기적 특성 (Electrical properties of $SrTiO_3$ thin films deposited at low temperatures by RF magnetron sputtering)

  • 김동식;이재신
    • 한국진공학회지
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    • 제5권4호
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    • pp.359-364
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    • 1996
  • Pt/Ti/$SiO_2$/Si 기판 위에 r.f. 마그네트론 스퍼터링 방법으로 $300^{\circ}C$이하의 저온에서 SrTiO3 박막을 증착하였다. XRD, RBS, TEM, EPMA로 증착된 박막의 재료적 특성을 분석하였고, Al/$SrTiO_3$/Pt의 구조로 커패시터를 제작하여 전기적 특성을 분석하였다. 기판온도가 증가함에 따라 박막의 결정성과 유전율이 향상되었으나, $200^{\circ}C$이하의 기판온도에서는 Sr이 결핍된 조성을 갖게 되어 증착된 박막이 반도성을 나타내었다. 증착중에 기판에 양의 d.c. 전압을 10~30V 인가함으로써 박막의 결정성이 크게 향상되었고, 유전특성도 개선되었다. $300^{\circ}C$의 기판온도에서 20V의 d.c. bias를 인가하여 증착한 400nm 두께의 $SrTiO_3$ 박막은 <211> 우선방향성을 갖는 주상정 구조와 화학양론적인 조성을 나타내었고, 본 연구에서 가장 우수한 전기적 특성을 보였다. 100 kHz에서 유전율이 98, 유전손실이 3.4%였으며, 3V에서 누설전류는 $10^{-5}A/\textrm{cm}^2$였다.

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Deep submicrometer PMOSFET의 hot carrier 현상과 소자 노쇠화 (Hot carrier effects and device degradation in deep submicrometer PMOSFET)

  • 장성준;김용택;유종근;박종태;박병국;이종덕
    • 전자공학회논문지A
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    • 제33A권4호
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    • pp.129-135
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    • 1996
  • In this paper, the hot carrier effect and device degradation of deep submicrometer SC-PMOSFETs have been measured and characterized. It has been shown that the substrate current of a 0.15$\mu$m PMOSFET increases with increasing of impact ionization rate, and the impact ionization rate is a function of the gate length and gate bias voltage. Correlation between gate current and substrate current is investigated within the general framework of the lucky-electron. It is found that the impact ionization rate increases, but the device degradation is not serious with decreasing effective channel length. SCIHE is suggested as the possible phusical mechanism for enhanced impact ionization rate and gate current reduction. Considering the hot carrier induced device degradation, it has been found that the maximum supply voltage is about -2.6V for 0.15$\mu$m PMOSFET.

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