• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 제38회 하계학술대회
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• pp.1263-1264
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• 2007

자계 유도 고상결정화(FESPC)를 이용하여 제작한 다결정실리콘(poly-Si) 박막 트랜지스터(TFT)는 비정질 실리콘 박막 트랜지스터(a-Si:H TFT)보다 뛰어난 전기적 특성과 우수한 안정성을 지닌다. $V_{DS}$ = -0.1 V에서 채널 폭과 길이가 각각 $5\;{\mu}m$, $7\;{\mu}m$인 P형 TFT의 이동도(${\mu}$)와 문턱 전압($V_{TH}$)은 각각 $31.98\;cm^2$/Vs, -6.14 V 이다. FESPC TFT는 일반 poly-Si TFT에 비해 채널 내 결정 경계 숫자가 많아서 상대적으로 열악한 특성을 가진다. 채널 길이 $5\;{\mu}m$인 TFT의 $V_{TH}$는 채널 길이 $18\;{\mu}m$ 소자의 $V_{TH}$보다 1.36V 작지만, 일반적으로 큰 값이다. 이 현상은 채널에 다수의 결정 경계가 존재하고, 수평 전계가 크기 때문이다. 수평 전계가 증가하면, 결정 경계의 전위 장벽 높이가 감소하게 되는데, 이는 DIGBL 효과이다. ${\mu}$의 증가에 따라서, 드레인 전류가 증가하고 $V_{TH}$은 감소한다. 활성화 에너지($E_a$)는 드레인 전압과 결정 경계의 수에 따라 변하는데, 드레인 전압이 크거나 결정 경계의 수가 감소하면 $E_a$는 감소한다. $E_a$가 감소하면 $V_{TH}$가 감소한다. 유리기판 위의 FESPC를 이용한 P형 poly-Si TFT의 $V_{TH}$는 채널의 길이와 $V_{DS}$에 영향을 받는다. 증가한 수평 전계가 결정 경계에서 에너지 장벽을 낮추는 효과를 일으키기 때문이다.

• Nano
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• 제13권10호
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• pp.1850124.1-1850124.12
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• 2018

$TiO_2$ films were deposited from oxygen/titanium tetraisopropoxide (TTIP) plasmas at low temperature by Helicon-PECVD at floating potential ($V_f$) or substrate self-bias of -50 V. The influence of titanium precursor partial pressure on the morphology, nanostructure and optical properties was investigated. Low titanium partial pressure ([TTIP] < 0.013 Pa) was applied by controlling the TTIP flow rate which is introduced by its own vapor pressure, whereas higher titanium partial pressure was formed through increasing the flow rate by using a carrier gas (CG). Then the precursor partial pressures [TTIP+CG] = 0:027 Pa and 0.093 Pa were obtained. At $V_f$, all the films exhibit a columnar structure, but the degree of inhomogeneity is decreased with the precursor partial pressure. Phase transformation from anatase ([TTIP] < 0.013 Pa) to amorphous ([TTIP+CG] = 0:093 Pa) has been evidenced since the $O^+_2$ ion to neutral flux ratio in the plasma was decreased and more carbon contained in the film. However, in the case of -50 V, the related growth rate for different precursor partial pressures is slightly (~15%) decreased. The columnar morphology at [TTIP] < 0.013 Pa has been changed into a granular structure, but still homogeneous columns are observed for [TTIP+CG] = 0:027 Pa and 0.093 Pa. Rutile phase has been generated at [TTIP] < 0:013 Pa. Ellipsometry measurements were performed on the films deposited at -50 V; results show that the precursor addition from low to high levels leads to a decrease in refractive index.

• 한국재료학회지
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• 제29권7호
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• pp.456-462
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• 2019

ZnO thin-films are grown on a p-Si(111) substrate by RF sputtering. The effects of growth temperature and $O_2$ mixture ratio on the ZnO films are investigated by scanning electron microscopy (SEM), X-ray diffraction (XRD), and room-temperature photoluminescence (PL) measurements. All the grown ZnO thin films show a strong preferred orientation along the c-axis, with an intense ultraviolet emission centered at 377 nm. However, when $O_2$ is mixed with the sputtering gas, the half width at half maximum (FWHM) of the XRD peak increases and the deep-level defect-related emission PL band becomes pronounced. In addition, an n-ZnO/p-Si heterojunction diode is fabricated by photolithographic processes and characterized using its current-voltage (I-V) characteristic curve and photoresponsivity. The fabricated n-ZnO/p-Si heterojunction diode exhibits typical rectifying I-V characteristics, with turn-on voltage of about 1.1 V and ideality factor of 1.7. The ratio of current density at ${\pm}3V$ of the reverse and forward bias voltage is about $5.8{\times}10^3$, which demonstrates the switching performance of the fabricated diode. The photoresponse of the diode under illumination of chopped with 40 Hz white light source shows fast response time and recovery time of 0.5 msec and 0.4 msec, respectively.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.100-101
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• 2012

The plasma damage free and room temperature processedthin film deposition technology is essential for realization of various next generation organic microelectronic devices such as flexible AMOLED display, flexible OLED lighting, and organic photovoltaic cells because characteristics of fragile organic materials in the plasma process and low glass transition temperatures (Tg) of polymer substrate. In case of directly deposition of metal oxide thin films (including transparent conductive oxide (TCO) and amorphous oxide semiconductor (AOS)) on the organic layers, plasma damages against to the organic materials is fatal. This damage is believed to be originated mainly from high energy energetic particles during the sputtering process such as negative oxygen ions, reflected neutrals by reflection of plasma background gas at the target surface, sputtered atoms, bulk plasma ions, and secondary electrons. To solve this problem, we developed the NBAS (Neutral Beam Assisted Sputtering) process as a plasma damage free and room temperature processed sputtering technology. As a result, electro-optical properties of NBAS processed ITO thin film showed resistivity of $4.0{\times}10^{-4}{\Omega}{\cdot}m$ and high transmittance (>90% at 550 nm) with nano- crystalline structure at room temperature process. Furthermore, in the experiment result of directly deposition of TCO top anode on the inverted structure OLED cell, it is verified that NBAS TCO deposition process does not damages to the underlying organic layers. In case of deposition of transparent conductive oxide (TCO) thin film on the plastic polymer substrate, the room temperature processed sputtering coating of high quality TCO thin film is required. During the sputtering process with higher density plasma, the energetic particles contribute self supplying of activation & crystallization energy without any additional heating and post-annealing and forminga high quality TCO thin film. However, negative oxygen ions which generated from sputteringtarget surface by electron attachment are accelerated to high energy by induced cathode self-bias. Thus the high energy negative oxygen ions can lead to critical physical bombardment damages to forming oxide thin film and this effect does not recover in room temperature process without post thermal annealing. To salve the inherent limitation of plasma sputtering, we have been developed the Magnetic Field Shielded Sputtering (MFSS) process as the high quality oxide thin film deposition process at room temperature. The MFSS process is effectively eliminate or suppress the negative oxygen ions bombardment damage by the plasma limiter which composed permanent magnet array. As a result, electro-optical properties of MFSS processed ITO thin film (resistivity $3.9{\times}10^{-4}{\Omega}{\cdot}cm$, transmittance 95% at 550 nm) have approachedthose of a high temperature DC magnetron sputtering (DMS) ITO thin film were. Also, AOS (a-IGZO) TFTs fabricated by MFSS process without higher temperature post annealing showed very comparable electrical performance with those by DMS process with $400^{\circ}C$ post annealing. They are important to note that the bombardment of a negative oxygen ion which is accelerated by dc self-bias during rf sputtering could degrade the electrical performance of ITO electrodes and a-IGZO TFTs. Finally, we found that reduction of damage from the high energy negative oxygen ions bombardment drives improvement of crystalline structure in the ITO thin film and suppression of the sub-gab states in a-IGZO semiconductor thin film. For realization of organic flexible electronic devices based on plastic substrates, gas barrier coatings are required to prevent the permeation of water and oxygen because organic materials are highly susceptible to water and oxygen. In particular, high efficiency flexible AMOLEDs needs an extremely low water vapor transition rate (WVTR) of $1{\times}10^{-6}gm^{-2}day^{-1}$. The key factor in high quality inorganic gas barrier formation for achieving the very low WVTR required (under ${\sim}10^{-6}gm^{-2}day^{-1}$) is the suppression of nano-sized defect sites and gas diffusion pathways among the grain boundaries. For formation of high quality single inorganic gas barrier layer, we developed high density nano-structured Al2O3 single gas barrier layer usinga NBAS process. The NBAS process can continuously change crystalline structures from an amorphous phase to a nano- crystalline phase with various grain sizes in a single inorganic thin film. As a result, the water vapor transmission rates (WVTR) of the NBAS processed $Al_2O_3$ gas barrier film have improved order of magnitude compared with that of conventional $Al_2O_3$ layers made by the RF magnetron sputteringprocess under the same sputtering conditions; the WVTR of the NBAS processed $Al_2O_3$ gas barrier film was about $5{\times}10^{-6}g/m^2/day$ by just single layer.

• 한국자기학회지
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• 제10권2호
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• pp.67-73
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• 2000

6개의 타겟을 가진 직류 마그네트론 방식을 이용하여 스파터링 전력 및 압력을 변화시켜 Si/Ta(50 $\AA$)NiFe(60 $\AA$)/CoFe(20 $\AA$)/Cu(26 $\AA$)/CoFe(40 $\AA$)/FeMn(150 $\AA$)Ta(50 $\AA$) 스핀 밸브 박막을 제조하여 교환자기이방성 및 자기적 특성을 조사하였다. FeMn 층의 증착시 스파터링 전력을 증가시킴으로써 교환이방성을 증가시킬 수 있었으며, X-선 회절 실험결과 스파터링 전력 증가에 따른 교환이방성의 증가는 FeMn (111)면의 우선성장 발달에 기인하는 것으로 판단되었다. 강자성상을 사이에 두고 있는 Cu의 스파터링 압력을 1-5 mTorr 증가시 교환이방성이 급격히 감소하며, 자기저항비 및 자장민감도도 감소하였다. Si/Ta/NiFe/CoFe/Cu(t), 30 W/CoFe, 100 W/FeMn, 100 W/Ta 스핀 밸브에서 Cu 두께를 22-38 $\AA$까지 변화시켜 자기저항비를 조사한 결과 Cu의 두께가 22 $\AA$일 때 자기저항비 6.5%까지 얻을 수 있었으며, Cu 두께를 감소시켜 교환이방성을 증가시킬 수 있었다. 이와 같은 Cu 두께 감소에 따른 교환이방성의 증가는 FM-AFM 스핀-스핀 상호작용에 의하여 설명하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.679-682
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• 2005

Negative-differential conductance (NDC) characteristics as well as negative-differential trans-conductance (NDT) characteristics have been observed in the room temperature I-V characteristics of Field-induced Inter-band Tunneling Effect Transistors (FITETs). These characteristics have been explained with inter-band tunneling physics, from which, inter-band tunneling current flows when the energy bands of degenerately doped regions align, and it does not flow when they don't. FITET is an SOI device and the body region is not directly connected to the external terminal. Therefore, Fermi energy in the body region is determined by electrical coupling among four regions - gate, source, drain and substrate. So, a quasi Fermi energy of the majority carriers in the floating body region can be changed by external voltages, and this causes the energy band movements in the body region, which determine whether the energy bands between degenerately doped junctions aligns or not. This is a key point for an explanation of NDT and NDC characteristics. In this paper, a quasi Fermi energy movement in the floating body region of FITET was investigated by a device simulation. This result was applied for the description of relation between quasi Fermi energy in the body region and external gate bias voltage.

• 한국재료학회지
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• 제24권9호
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• pp.443-450
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• 2014

Amorphous (a-Si) films were epitaxially crystallized on a very thin large-grained poly-Si seed layer by a silicide-enhanced rapid thermal annealing (SERTA) process. The poly-Si seed layer contained a small amount of nickel silicide which can enhance crystallization of the upper layer of the a-Si film at lower temperature. A 5-nm thick poly-Si seed layer was then prepared by the crystallization of an a-Si film using the vapor-induced crystallization process in a $NiCl_2$ environment. After removing surface oxide on the seed layer, a 45-nm thick a-Si film was deposited on the poly-Si seed layer by hot-wire chemical vapor deposition at $200^{\circ}C$. The epitaxial crystallization of the top a-Si layer was performed by the rapid thermal annealing (RTA) process at $730^{\circ}C$ for 5 min in Ar as an ambient atmosphere. Considering the needle-like grains as well as the crystallization temperature of the top layer as produced by the SERTA process, it was thought that the top a-Si layer was epitaxially crystallized with the help of $NiSi_2$ precipitates that originated from the poly-Si seed layer. The crystallinity of the SERTA processed poly-Si thin films was better than the other crystallization process, due to the high-temperature RTA process. The Ni concentration in the poly-Si film fabricated by the SERTA process was reduced to $1{\times}10^{18}cm^{-3}$. The maximum field-effect mobility and substrate swing of the p-channel poly-Si thin-film transistors (TFTs) using the poly-Si film prepared by the SERTA process were $85cm^2/V{\cdot}s$ and 1.23 V/decade at $V_{ds}=-3V$, respectively. The off current was little increased under reverse bias from $1.0{\times}10^{-11}$ A. Our results showed that the SERTA process is a promising technology for high quality poly-Si film, which enables the fabrication of high mobility TFTs. In addition, it is expected that poly-Si TFTs with low leakage current can be fabricated with more precise experiments.