• 제목/요약/키워드: Static power

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전력품질 향상을 위한 배전용 STATCOM 운전결과 분석 (Analysis of the Distribution STATCOM Operating Results for Improving Distribution System Power Quality)

  • 오관일;전영수;박상태;추진부
    • 전력전자학회논문지
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    • 제5권4호
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    • pp.377-385
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    • 2000
  • 본 논문에서는 국내 최초로 설치된 Custom Power기기인 배전용 STATCOM(STATic COMpensator)의 기기 신뢰성 확보를 위힌 기가 테스트 및 설계통 운전 분석결과를 보이고 있다. Custom Power는 유연송전시스템(FACTS : Flexible AC Transmission System)과 같이 교류전력계통을 제어함으로써 효율적이고 유연한 전력계통의 운용과 구성을 목적으로 한다. STATCOM은 Custom Power기기의 한 형태로 무효전력 보상, 전압조정, 그리고 전압 퓰리커 억제 등의 기능을 가진다. 본 논문에서는 STATCOM 시운전 결과 무효전력과 역률 보상에서 우수한 성능을 보임을 확인할 수 있다.

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A Review of SiC Static Induction Transistor (SIT) Development for High-Frequency Power Amplifiers

  • Sung, Y.M.;Casady, J.B.;Dufrene, J.B.
    • KIEE International Transactions on Electrophysics and Applications
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    • 제11C권4호
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    • pp.99-106
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    • 2001
  • An overview of Silicon Carbide (SiC) Static Induction Transistor (SIT) development is presented. Basic conduction mechanisms are introduced and discussed, including ohmic, exponential, and space charge limited conduction (SCLC) mechanisms. Additionally, the impact of velocity saturation and temperature effects on SCLC are reviewed. The small-signal model, breakdown voltage, power density, and different gate structures are also discussed, before a final review of published SiC SIT results. Published S-band (3-4 GHz) results include 9.5 dB of gain and output power of 120 W, and L-band (1.3 GHz) results include 400 W output power, 7.7 dB of gain, and power density of 16.7 W/cm.

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Controller Design for Static Reactive Power Generator in Transmission System

  • Han, B.M.;Soh, Y.C.;Kim, H.W.
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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    • pp.398-403
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    • 1998
  • This paper describes a controller design for the stator reactive power generator in the transmission system. The controller of static reactive power generator was designed using a mathematical model and non-linear state feedback. The performance of controller was verified using computer simulation with EMTP code and experimental work with scaled-model. The dynamic interaction with a simple power system was also analyzed using both the simulation model and hardware scaled-model. Both simulation and experimental results prove that the controller using PI block and non-linear state feedback offers better performance than the controller using PI block only.

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An Adaptive Power Saving Mechanism in IEEE 802.11 Wireless IP Networks

  • Pack Sangheon;Choi Yanghee
    • Journal of Communications and Networks
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    • 제7권2호
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    • pp.126-134
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    • 2005
  • Reducing energy consumption in mobile hosts (MHs) is one of the most critical issues in wireles/mobile networks. IP paging protocol at network layer and power saving mechanism (PSM) at link layer are two core technologies to reduce the energy consumption of MHs. First, we investigate the energy efficiency of the current IEEE 802.11 power saving mechanism (PSM) when IP paging protocol is deployed over IEEE 802.11 networks. The result reveal that the current IEEE 802.11 PSM with a fixed wakeup interval (i.e., the static PSM) exhibits a degraded performance when it is integrated with IP paging protocol. Therefore, we propose an adaptive power saving mechanism in IEEE 802.11-based wireless IP networks. Unlike the static PSM, the adaptive PSM adjusts the wake-up interval adaptively depending on the session activity at IP layer. Specifically, the MH estimates the idle periods for incoming sessions based on the exponentially weighted moving average (EWMA) scheme and sets its wake-up interval dynamically by considering the estimated idle period and paging delay bound. For performance evaluation, we have conducted comprehensive simulations and compared the total cost and energy consumption, which are incurred in IP paging protocol in conjunction with various power saving mechanisms: The static PSM, the adaptive PSM, and the optimum PSM. Simulation results show that the adaptive PSM provides a closer performance to the optimum PSM than the static PSM.

Two Phase Clocked Adiabatic Static CMOS Logic and its Logic Family

  • Anuar, Nazrul;Takahashi, Yasuhiro;Sekine, Toshikazu
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제10권1호
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    • pp.1-10
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    • 2010
  • This paper proposes a two-phase clocked adiabatic static CMOS logic (2PASCL) circuit that utilizes the principles of adiabatic switching and energy recovery. The low-power 2PASCL circuit uses two complementary split-level sinusoidal power supply clocks whose height is equal to $V_{dd}$. It can be directly derived from static CMOS circuits. By removing the diode from the charging path, higher output amplitude is achieved and the power consumption of the diode is eliminated. 2PASCL has switching activity that is lower than dynamic logic. We also design and simulate NOT, NAND, NOR, and XOR logic gates on the basis of the 2PASCL topology. From the simulation results, we find that 2PASCL 4-inverter chain logic can save up to 79% of dissipated energy as compared to that with a static CMOS logic at transition frequencies of 1 to 100 MHz. The results indicate that 2PASCL technology can be advantageously applied to low power digital devices operated at low frequencies, such as radio-frequency identifications (RFIDs), smart cards, and sensors.

PWM-Based Sliding Mode Controller for Three-Level Full-Bridge DC-DC Converter that Eliminates Static Output Voltage Error

  • Liu, Jilong;Xiao, Fei;Ma, Weiming;Fan, Xuexin;Chen, Wei
    • Journal of Power Electronics
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    • 제15권2호
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    • pp.378-388
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    • 2015
  • This paper proposes a pulse width modulation (PWM)-based sliding mode controller (SMC) for a full-bridge DC-DC converter that can eliminate static output voltage error. Hysteretic SMC in DC-DC converter does not have a fixed switching frequency, and applying hysteretic SMC to full-bridge converters is difficult. Fixed-frequency SMC, which is also called PWM-based SMC, based on equivalent control overcomes these shortcomings. However, the controller order reduction in equivalent control in PWM-based SMC causes static output voltage error. To resolve this issue, an integral item is added to the PWM-based SMC. Sliding mode coefficients are designed by applying a standard second-order system to the sliding mode surface. The effect of adding an integral item on the controller is analyzed, and an integral coefficient design method is proposed. Experiment results on a three-level full-bridge DC-DC converter verify the control scheme and design method proposed in this paper.

서버 클러스터 환경에서 에너지 절약을 위한 서버 전원 모드 제어에서의 동적 종료 (Dynamic Shutdown of Server Power Mode Control for Saving Energy in a Server Cluster Environment)

  • 김호현;함치환;곽후근;정규식
    • 정보처리학회논문지:컴퓨터 및 통신 시스템
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    • 제2권7호
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    • pp.283-292
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    • 2013
  • 기존 서버 클러스터에서는 고성능을 보장하기 위해, 실시간 요청 수량에 관계없이 모든 서버를 항상 On 한다. 그 방법에서는 QoS를 보장하지만 일부 서버들이 Idle할 때 서버 전력을 낭비하게 된다. 서버들이 소모하는 에너지를 절약하기 위해, 서버가 필요하지 않을 경우 해당 서버의 전력을 Off 하게 하는 서버 전력 제어 방법이 제안되었다. 서버 전력 제어 방법은 서버의 Power가 실제로 어느 시점에 Off 되느냐에 따라 정적인 방법과 동적인 방법이 있다. 정적인 방법에서는 특정 서버가 Off 하기로 결정된 다음 일정 시간 지연 후 그 서버가 Off 된다. 동적인 방법에서는 그 서버에서 수행중인 모든 서비스가 종료된 다음에 해당 서버가 Off 된다. 이는 가변 시간 지연 후 서버가 Off 되는 방법에 해당된다. 정적 종료방식은 단점이 있다. 반복 실험을 통해 수작업으로 최적의 시간 지연을 알아내기 위해서는 많은 시간이 소요된다. 본 논문에서는 정적 종료 방식의 단점을 극복하는 동적 종료 방식을 제안한다. 제안된 방식은 최적의 지연 시간으로 자동적으로 접근하므로 좋은 전력 절약을 하면서 QoS를 보장하는 것을 가능하게 해준다. 30대의 PC 클러스터를 이용하여 실험이 수행되었다. 실험결과는 제안하는 동적 종료 방법이 기존의 정적 종료 방법과 비교할 때 에너지 절감측면에서는 비슷하지만 QoS 측면에서 우수함을 보여준다.

육면체 요소를 도입한 유한요소-전달강성계수법에 의한 3차원 고체 구조물의 정적 해석 (Static Analysis of Three Dimensional Solid Structure by Finite Element-Transfer Stiffness Coefficent Method Introducing Hexahedral Element)

  • 최명수;문덕홍
    • 동력기계공학회지
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    • 제16권1호
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    • pp.78-83
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    • 2012
  • The authors suggest the algorithm for the static analysis of a three dimensional solid structure by using the finite element-transfer stiffness coefficient method (FE-TSCM) and the hexahedral element of the finite element method (FEM). MATLAB codes were made by both FE-TSCM and FEM for the static analysis of three dimensional solid structure. They were applied to the static analyses of a very thick plate structure and a three dimensional solid structure. In this paper, as we compare the results of FE-TSCM with those of FEM, we confirm that FE-TSCM introducing the hexahedral element for the static analysis of a three dimensional solid structure is very effective from the viewpoint of the computational accuracy, speed, and storage.

Comparative Study of the Behavior of a Wind Farm Integrating Three Different FACTS Devices

  • Sarrias, Raul;Gonzalez, Carlos;Fernandez, Luis M.;Garcia, Carlos Andres;Jurado, Francisco
    • Journal of Electrical Engineering and Technology
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    • 제9권4호
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    • pp.1258-1268
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    • 2014
  • Improving grid connection of wind farms is a relevant issue to be addressed, especially for fixed-speed wind turbines. Certain elements, such as FACTS (Flexible AC Transmission Systems), are able to perform voltage and reactive power regulation in order to support voltage stability of wind farms, and compensate reactive power consumption from the grid. Several devices are grouped under the name of FACTS, which embrace different technologies and operating principles. Here, three of them are evaluated and compared, namely STATCOM (Static Synchronous Compensator), SVC (Static Var Compensator) and SSSC (Static Synchronous Series Compensator). They have been modeled in MATLAB/Simulink, and simulated under various scenarios, regarding both normal operation and grid fault conditions. Their response is studied together with the case when no FACTS are implemented. Results show that SSSC improves the voltage stability of the wind farm, whereas STATCOM and SVC provide additional reactive power.

파워 스위치 구조를 결합한 비동기 회로 설계 (Asynchronous Circuit Design Combined with Power Switch Structure)

  • 김경기
    • 한국산업정보학회논문지
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    • 제21권1호
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    • pp.17-25
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    • 2016
  • 본 논문은 동기회로에서 누설 전류를 줄이기 위해서 사용되는 파워 스위치 구조를 결합한 새로운 구조의 저전력 비동기 회로 설계 방법을 제안하고자 한다. Static 방식, Semi-static 방식과 같은 기존의 지연 무관방식의 비동기 방식과 비교해서 다소 속도의 손해는 있지만, 파워 스위치에 의해서 데이터가 없는 상태에서는 누설 전력을 줄일 수 있고, 전체 사이즈가 작아짐으로써 데이터가 입력되는 순간의 스위칭 전력도 줄일 수 있는 장점이 있다. 따라서, 제안된 방법은 속도보다 저전력을 기본으로 하는 사물인터넷 시스템에서 요구되는 전전력 설계 방법이 될 것이다. 본 논문에서는 새로운 방식의 비동기 회로를 사용하여 $4{\times}4$곱셈기를 0.11um 공정으로 설계하고, 기존의 비동기 방식의 곱셈기와 스피드, 누설 전류, 스위칭 파워, 회로 크기 등을 비교하였다.