• Title/Summary/Keyword: Static output voltage error

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Static-Error-Free Digital PID Voltage Regulator for UPS Inverter (정상상태오차 없는 UPS 인버터용 디지털 PID 전압 제어기)

  • Kim, Byoung-Jin;Choi, Jae-Ho
    • Proceedings of the KIEE Conference
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    • 2000.07b
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    • pp.1227-1229
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    • 2000
  • The output voltage of UPS must not vary according to the load variation But the output voltage varies due to the load variation when a PI voltage regulator is used which has inherently a static state error. This paper presents a static-error-free digital PID voltage regulator for an UPS inverter to overcome additionally the voltage unbalance problem in three Phase system as well as the above problem.

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PWM-Based Sliding Mode Controller for Three-Level Full-Bridge DC-DC Converter that Eliminates Static Output Voltage Error

  • Liu, Jilong;Xiao, Fei;Ma, Weiming;Fan, Xuexin;Chen, Wei
    • Journal of Power Electronics
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    • v.15 no.2
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    • pp.378-388
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    • 2015
  • This paper proposes a pulse width modulation (PWM)-based sliding mode controller (SMC) for a full-bridge DC-DC converter that can eliminate static output voltage error. Hysteretic SMC in DC-DC converter does not have a fixed switching frequency, and applying hysteretic SMC to full-bridge converters is difficult. Fixed-frequency SMC, which is also called PWM-based SMC, based on equivalent control overcomes these shortcomings. However, the controller order reduction in equivalent control in PWM-based SMC causes static output voltage error. To resolve this issue, an integral item is added to the PWM-based SMC. Sliding mode coefficients are designed by applying a standard second-order system to the sliding mode surface. The effect of adding an integral item on the controller is analyzed, and an integral coefficient design method is proposed. Experiment results on a three-level full-bridge DC-DC converter verify the control scheme and design method proposed in this paper.

THE EFFECTIVE VOLTAGE CONTROL SCHEME OF THE INVERTER FOR A STATIC POWER SUPPLY

  • Kim, Byoungjin;Song, Youngsin;Ji, Myoungku;Lee, Jongha;Choi, Jaeho
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.336-340
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    • 1998
  • In this paper, an effective control scheme of a single phase UPS inverter is proposed to have no steady state error of the output voltage and the fast response for the load request. The cosine wave tranfer function is proposed to control the output voltage. This controller clearly removes errors of magnitude and phase both in the steady state. On the other hand, a current controller is proposed to reduce the transient time of the voltage control and to improve the bad distorted factor of the output voltage waveform by the load fluctuation and the presences of nonlinear parameters in the plant. The current controller is designed parallel to the voltage controller and performs separately from it.

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Nonlinear Excitation Control Design of Generator Based on Multi-objective Feedback

  • Chen, Dengyi;Li, Xiaocong;Liu, Song
    • Journal of Electrical Engineering and Technology
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    • v.13 no.6
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    • pp.2187-2195
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    • 2018
  • In order to realize the multi-objective control of single-input multi-output nonlinear differential algebraic system (NDAS) and to improve the dynamic characteristics and static accuracy, a design method of nonlinear control with multi-objective feedback (NCMOF) is proposed, the principium of this method to arrange system poles, as well as its nature to coordinate dynamic characteristics and static accuracy of the system are analyzed in detail. Through NCMOF design method, the multi-objective control of the system is transformed into linear space, and then it is effectively controlled under the nonlinear feedback control law, the problem to balance all control objectives caused by less input and more output of the system thus is solved. Applying NCMOF design method to generator excitation system, the nonlinear excitation control law with terminal voltage, active power and rotor speed as objective outputs is designed. Simulation results show that NCMOF can not only improve the dynamic characteristics of generator, but also damp the mechanical oscillation of a generator in transient process. Moreover, NCMOF can control the terminal voltage of the generator to the setting value with no static error under typical disturbances.

Sensorless Passivity Based Control of a DC Motor via a Solar Powered Sepic Converter-Full Bridge Combination

  • Linares-Flores, Jesus;Sira-Ramirez, Hebertt;Cuevas-Lopez, Edel F.;Contreras-Ordaz, Marco A.
    • Journal of Power Electronics
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    • v.11 no.5
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    • pp.743-750
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    • 2011
  • This article deals with the sensor-less control of a DC Motor via a SEPIC Converter-Full Bridge combination powered through solar panels. We simultaneously regulate, both, the output voltage of the SEPIC-converter to a value larger than the solar panel output voltage, and the shaft angular velocity, in any of the turning senses, so that it tracks a pre-specified constant reference. The main result of our proposed control scheme is an efficient linear controller obtained via Lyapunov. This controller is based on measurements of the converter currents and voltages, and the DC motor armature current. The control law is derived using an exact stabilization error dynamics model, from which a static linear passive feedback control law is derived. All values of the constant references are parameterized in terms of the equilibrium point of the multivariable system: the SEPIC converter desired output voltage, the solar panel output voltage at its Maximun Power Point (MPP), and the DC motor desired constant angular velocity. The switched control realization of the designed average continuous feedback control law is accomplished by means of a, discrete-valued, Pulse Width Modulation (PWM). Experimental results are presented demonstrating the viability of our proposal.

Analysis of the Fixed Frequency LCL-type Converter at Continuous Current Mode Including Parasitic Losses (연속전류모드에서 기생손실들을 고려한 고정주파수 LCL형 컨버터 해석)

  • Park, Sangeun;Cha, Hanju
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.5
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    • pp.785-793
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    • 2016
  • This paper analyzes an LCL-type isolated dc-dc converter operating for constant output voltage in the continuous conduction mode(CCM) with resistances of parasitic losses-static drain-source on resistance of power switch, ESR of resonant network(L-C-L)-using a high loaded quality factor Q assumptions and fourier series techniques. Simple analytical expressions for performance characteristics are derived under steady-state conditions for designing and understanding the behavior of the proposed converter. The voltage-driven rectifier is analyzed, taking into account the diode threshold voltage and the diode forward resistance. Experimental results measured for a proposed converter at low input voltage and various load resistances show agreement to the theoretical performance predicted by the analysis within maximum 4% error. Especially in the case of low output voltages and large loads, It is been observed that introduction of both rectifier and the parasitic components of converter had considerable effect on the performance.

A Design of Wide-Bandwidth LDO Regulator with High Robustness ESD Protection Circuit

  • Cho, Han-Hee;Koo, Yong-Seo
    • Journal of Power Electronics
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    • v.15 no.6
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    • pp.1673-1681
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    • 2015
  • A low dropout (LDO) regulator with a wide-bandwidth is proposed in this paper. The regulator features a Human Body Model (HBM) 8kV-class high robustness ElectroStatic Discharge (ESD) protection circuit, and two error amplifiers (one with low gain and wide bandwidth, and the other with high gain and narrow bandwidth). The dual error amplifiers are located within the feedback loop of the LDO regulator, and they selectively amplify the signal according to its ripples. The proposed LDO regulator is more efficient in its regulation process because of its selective amplification according to frequency and bandwidth. Furthermore, the proposed regulator has the same gain as a conventional LDO at 62 dB with a 130 kHz-wide bandwidth, which is approximately 3.5 times that of a conventional LDO. The proposed device presents a fast response with improved load and line regulation characteristics. In addition, to prevent an increase in the area of the circuit, a body-driven fabrication technique was used for the error amplifier and the pass transistor. The proposed LDO regulator has an input voltage range of 2.5 V to 4.5 V, and it provides a load current of 100 mA in an output voltage range of 1.2 V to 4.1 V. In addition, to prevent damage in the Integrated Circuit (IC) as a result of static electricity, the reliability of IC was improved by embedding a self-produced 8 kV-class (Chip level) ESD protection circuit of a P-substrate-Triggered Silicon Controlled Rectifier (PTSCR) type with high robustness characteristics.

A Design of Power System Stabilization for SVC System Using Self Tuning Fuzzy Controller (자기조정 퍼지제어기를 이용한 SVC계통의 안정화 장치의 설계)

  • Joo, Seok-Min;Hur, Dong-Ryol;Kim, Hai-Jai
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.51 no.2
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    • pp.60-67
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    • 2002
  • This paper presents a control approach for designing a self tuning fuzzy controller for a synchronous generator excitation and SVC system. A combination of thyristor-controlled reactors and fixed capacitors (TCR-FC) type SVC is recognized as having the most flexible control and high speed response, which has been widely utilized in power systems, is considered and designed to improve the response of a synchronous generator, as well as controlling the system voltage. The proposed parameter self tuning algorithm of fuzzy controller is based on the steepest decent method using two direction vectors which make error between inference values of fuzzy controller and output values of the specially selected PSS reduce steepestly. Using input-output data pair obtained from PSS, the parameters in antecedent part and in consequent part of fuzzy inference rules are learned and tuned automatically using the proposed steepest decent method. The related simulation results show that the proposed fuzzy controller is more powerful than the conventional ones.

Improved Sliding Mode Controller for Shunt Active Power Filter

  • Sahara, Attia;Kessal, Abdelhalim;Rahmani, Lazhar;Gaubert, Jean-Paul
    • Journal of Electrical Engineering and Technology
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    • v.11 no.3
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    • pp.662-669
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    • 2016
  • In this work, nonlinear control of a three-phase shunt active power filter (SAPF) has been studied and compared to classical control based on proportional integral regulator. The control strategy is based on the direct current method using sliding mode control (SMC), where the aim is to regulate the average voltage across the dc bus of the inverter. Details are given for the control algorithm; the controller is comprised of a current loop which utilizes a hysteresis controller to generate the gating signals for the switching devices, and a nonlinear controller based on SMC law which is different from classical laws based on error between reference and measured output voltage of the inverter. Sliding surface applied in this work contains the whole of state variables, in order to ensure full control of the system behavior in the presence of disturbances that affect the supply source, the load parameters or the reference value. The designed controller offers advantage that it can gives the improvement of dynamic and static performances in cases of large disturbances. A comparison of the effects of PI control and SMC on the APF response in steady stat, under line variations, load variations, and different component variations is performed.

A DLL-Based Multi-Clock Generator Having Fast-Relocking and Duty-Cycle Correction Scheme for Low Power and High Speed VLSIs (저전력 고속 VLSI를 위한 Fast-Relocking과 Duty-Cycle Correction 구조를 가지는 DLL 기반의 다중 클락 발생기)

  • Hwang Tae-Jin;Yeon Gyu-Sung;Jun Chi-Hoon;Wee Jae-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.2 s.332
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    • pp.23-30
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    • 2005
  • This paper describes a DLL(delay locked loop)-based multi-clock generator having the lower active stand-by power as well as a fast relocking after re-activating the DLL. for low power and high speed VLSI chip. It enables a frequency multiplication using frequency multiplier scheme and produces output clocks with 50:50 duty-ratio regardless of the duty-ratio of system clock. Also, digital control scheme using DAC enables a fast relocking operation after exiting a standby-mode of the clock system which was obtained by storing analog locking information as digital codes in a register block. Also, for a clock multiplication, it has a feed-forward duty correction scheme using multiphase and phase mixing corrects a duty-error of system clock without requiring additional time. In this paper, the proposed DLL-based multi-clock generator can provides a synchronous clock to an external clock for I/O data communications and multiple clocks of slow and high speed operations for various IPs. The proposed DLL-based multi-clock generator was designed by the area of $1796{\mu}m\times654{\mu}m$ using $0.35-{\mu}m$ CMOS process and has $75MHz\~550MHz$ lock-range and maximum multiplication frequency of 800 MHz below 20psec static skew at 2.3v supply voltage.