• Title/Summary/Keyword: State_Diagram

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Application of Potential-pH Diagram and Potentiodynamic Polarization of Tungsten

  • Seo, Yong-Jin;Park, Sung-Woo;Lee, Woo-Sun
    • Transactions on Electrical and Electronic Materials
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    • v.7 no.3
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    • pp.108-111
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    • 2006
  • The oxidizer-induced corrosion state and microstructure of surface passive metal-oxide layer greatly influenced on the removal rate of tungsten film according to the slurry chemical composition of different mixed oxidizers. In this paper, the actual polishing mechanism and pH-potential equilibrium diagram obtained from potentiodynamic polarization curve were electrochemically compared. An electrochemical corrosion effect implies that slurries with the highest removal rate (RR) have the high dissolution rate.

Transient behavior of cryogenic thermosiphon working with R14 and nitrogen mixture (R14와 질소 혼합유체를 사용하는 극저온 열사이펀의 과도상태 거동)

  • Lee, Ji-Sung;Jeong, Sang-Kwon
    • Progress in Superconductivity and Cryogenics
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    • v.12 no.1
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    • pp.66-70
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    • 2010
  • The operational temperature range of thermosiphon is generally limited from the critical point to the triple point of the working fluid to maintain two-phase state. Thermosiphon with mixed working fluid has a potential to widen the operational temperature range. In this study, the physical behavior of mixed working fluid during the transient operation of thermosiphon was analyzed with temperature-mole fraction diagram. The condenser and the evaporator temperature variations were explained by the dew line and the bubble line of the mixture. It is encouraging that the thermosiphon operation commences early with larger fraction of high boiling point component, but the temperature gap between the condenser and the evaporator due to the separation of two components has a negative effect on the officient cool down process.

Comparison of Test Case Effectiveness Based on Dynamic Diagrams Using Mutation Testing (뮤테이션 테스트를 이용한 동적 다이어그램에 근거한 테스트 케이스의 효율 비교)

  • Lee, Hyuck-Su;Choi, Eun-Man
    • The KIPS Transactions:PartD
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    • v.16D no.4
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    • pp.517-526
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    • 2009
  • It is possible to indicate the complex design and execution of object-oriented program with dynamic UML diagram. This paper shows the way how to make several test cases from sequence, state, and activity diagram among dynamic UML diagram. Three dynamic UML diagrams about withdrawal work of ATM simulation program are drawn. Then different test cases are created from these diagrams using previously described ways. To evaluate effectiveness of test cases, mutation testing is executed. Mutants are made from MuClipse plug-in tool based on Eclipse which supports many traditional and class mutation operators. Finally we've got the result of mutation testing and compare effectiveness of test cases, etc. Through this document, we've known some hints that how to choose the way of making test cases.

A Design of Constructing Diagram Repository for UML Diagram Tools (UML 다이어그램 도구를 위한 다이어그램 정보의 구축과 설계)

  • Kim, Yun-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.24 no.2
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    • pp.244-251
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    • 2020
  • This paper presents a design of the Meta-Class Repository (MCR) which maintain syntactically analyzed and structured meta-class information from UML diagrams, and then proposes 'meta-class,' also known as super-class, to construct structured information analyzed syntactically. The MCR is a collection of these meta-classes which contains the information extracted from diagrams. This paper also presents a design of the Code Generation Engine (CGE) which roles generating codes corresponding classes from UML diagrams based on the MCR maintaining a collection of meta-classes which is syntactically-analyzed and constructed in previous process. The logics of CGE are designed to generate codes collaborated with MCR and CGE with integration. The logics of CGE mechanism is presented with the form of finite state machine to present the algorithms of code generation formally and have the advantages of simplicity and easiness in development.

An Analysis of Cold Foging at Final State Using Rigid-Plastic FEM (강소성 유한요소법을 이용한 냉간단조 공정의 최종단계 해석)

  • Choi, Y.;Jung, S.Y.;Kim, B.M.;Choi, J.C.
    • Transactions of Materials Processing
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    • v.8 no.1
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    • pp.108-115
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    • 1999
  • In this paper, the analysis of cold forging in final state has been performed by using rigid-plastic FEM. For the analysis, the geometry and flow stress of the workpiece are required. One method to obtain the geometry is measurement of that made from experimet. To evaluate the flow stress, average effective strain is calculated from the load-stroke diagram by using energy method. The numerical test performed to show the validity of propose method. The analysis of PFIR, the precision forging of spurgear with inside relif, is performed.

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Mixed-state Hall angle Hg-based superconducting thin films

  • Kim, Wan-Seon;Lee, Sung-Ik;Kang, Won-Nam
    • 한국초전도학회:학술대회논문집
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    • v.10
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    • pp.41-44
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    • 2000
  • The mixed-state Hall angle has been measured in Hg-based superconducting thin films as functions of magnetic fields (H) up to 18 T. The temperature dependence of the Hall angle shows a peak (T$^{\ast}$) at low temperature, which is consistent with a crossover point from the thermally activated flux flow (TAFF) to a critical region (CR). At low fields below 10 T, T$^{\ast}$ shifts to low temperature with increasing fields. Interestingly, however, we found that T$^{\ast}$ is independent of fields above 10 T, suggesting unusual vortex state. A physical implication of H - T$^{\ast}$ line will be discussed.

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Mixed-state Hall Angle in Hg-based Superconducting Thin Films

  • Kang, Won-Nam;Kim, Wan-Seon;Lee, Sung-Ik
    • Progress in Superconductivity
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    • v.2 no.1
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    • pp.39-42
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    • 2000
  • The mixed-state Hall angle has been measured in Hg-based superconducting thin films as functions of magnetic fields (H) up to 18 T. The temperature dependence of the Hall angle shows a peak (T*) at low temperature, which is consistent with a crossover point from the thermally activated flux flow (TAFF) to a critical region (CR). At low fields below 10 T, T* shifts to low temperature with increasing fields. Interestingly, however, we found that T* is independent of fields above 10 T, suggesting unusual vortex state. A physical implication of H-T* line will be discussed.

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Carrier Based Single-State PWM Technique for Minimizing Vector Errors in Multilevel Inverters

  • Nho, Nguyen Van;Hai, Quach Thanh;Lee, Hong-Hee
    • Journal of Power Electronics
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    • v.10 no.4
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    • pp.357-364
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    • 2010
  • In this paper, a novel analysis of a carrier based PWM method for multilevel inverters is presented. The space vector PWM and carrier based PWM correlations in multilevel inverters are investigated in a nominal two-level switching diagram. The obtained results can be applied to design various carrier PWM techniques. In this paper, a carrier based single-state PWM technique, which reduces the switching number and optimizes the active voltage errors, is presented. This PWM technique can be advantageous if there are a large number of levels. The proposed method is mathematically formulated and demonstrated by simulations and experimental results.

Method of Implementing Communication Module Using FPGA (FPGA 를 이용한 통신 모듈 구현 방법)

  • Ha, Kyoung-Joon;Do, Young-Soo;Jeon, Jae-Wook
    • Proceedings of the Korea Information Processing Society Conference
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    • 2021.05a
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    • pp.62-65
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    • 2021
  • 통신은 주로 통신의 시작, 데이터 전송, 오류 검사, 통신의 종료 4 가지 과정을 거쳐 이루어진다. 위 4 가지 과정에 따라 통신 모듈의 상태(state)를 분류하고 상태도(state diagram)를 그릴 수 있다. HDL 언어를 사용하여 상태도를 유한 상태 기계(finite-state machine)로 구현함으로써 통신 모듈을 쉽게 구현할 수 있다. 본 논문은 이러한 방법으로 FPGA 에 통신 모듈을 구현하는 방법을 다루고 있다. 나아가, 이 방법을 이용하여 UART 와 SPI 통신 모듈을 구현하는 실험을 소개한다.

Novel Single-State PWM Technique for Common-Mode Voltage Elimination in Multilevel Inverters

  • Nguyen, Nho-Van;Quach, Hai-Thanh;Lee, Hong-Hee
    • Journal of Power Electronics
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    • v.12 no.4
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    • pp.548-558
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    • 2012
  • In this paper, a novel offset-based single-state pulse width modulation (PWM) method for achieving zero common-mode voltage (CMV) and reducing switching losses in multilevel inverters is presented. The specific active switching state of the zero common-mode (ZCM) voltage that approximates the reference voltage can be deduced from the switching state sequence of the reduced CMV phase disposition PWM (CMV PD PWM) method. From the reference leg voltages for the zero common-mode voltage, an N-to-2-level transformation defines a virtual two-level inverter and the corresponding nominal leg voltage references. The commutation process of the reduced CMV PD PWM method in a multilevel inverter and its outputs can be simply followed in a nominal switching time diagram for the virtual inverter. The characteristics of the reduced CMV PD PWM and the single-state PWM for zero common-mode voltage are analyzed in detail in this paper. The theoretical analysis of the proposed PWM method is verified by experimental results.