• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2015.07a
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• pp.98-101
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• 2015

최근, 텔레비전을 시청하지 않는 대기 상태에서의 셋톱박스의 대기 전력이 여타 가전기기의 대기 전력보다 10 배 이상을 상회하고 있어, 셋톱박스의 대기전력 저감은 국가적으로도 관심을 받고 있다. 셋톱박스의 대기전력 저감을 위해 대기상태의 셋톱박스의 최소전력 동작 모드인 수동대기모드가 제안되었지만, 셋톱박스가 수동대기모드에서는 셋톱박스의 업데이트 및 제어가 어려우므로, 셋톱박스의 수동대기모드 활용은 어려울 것이다. 본 논문은 수동대기모드에 가까운 대기전력을 소모하면서도 대기상태에서도 셋톱박스의 업데이트를 제공할 수 있는 망연동수동대기 모드를 정의하고, 망연동수동대기모드를 이용한 셋톱박스의 업데이트를 위한 셋톱박스 제어기법을 제안하고, 이 제어 기법을 위한 셋톱박스와 네트워크의 구조, 기능, 시그널링에 대해 설명한다. 본 논문의 망연동수동대기모드와 제어 방안은 셋톱박스 사업자 측면에서 활용성이 높으므로, 낮은 대기전력을 소모하는 셋톱박스 시장을 활성화하여 국가 및 세계적인 전력 감소에 큰 기여를 할 것이다.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.36 no.7
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• pp.712-718
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• 2008

This paper deals with a development of flight control law switching system which can be used for flight test of the research control law by switching control law during flight. Through this research program, fader logic and integrator stabilization design has been introduced to minimize the transient response of aircraft caused by flight control law switching and to prevent the divergence of the integrator included in the control law in standby mode. MIL-STD-1553B communication was applied to transfer the data between the two control laws. This paper introduce the control law switching system architecture and major design concept and include the system verification and validation result performed on the flying quality simulator of the advanced trainer.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.911-916
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• 2007

The home gateway, an equipment which works as an gateway for ubiquitous home network, relays all functions of a home network. The home gateway must always be connected in order to provide seamless services. However it gives unfavorable power consumption. Therefore the needs for working in maximum power saving mode while there is no data traffic and for invoking to the normal function when it is necessary. In this paper we survey the technical papers and the standards documents and provide an overview of power saving mode in the home gateway.

• Proceedings of the KSRS Conference
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• 2002.10a
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• pp.235-240
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• 2002

This paper shows the desist concept of an ATS(Antenna Tracking Software) to control the movement of the MSC(Multi-Spectral Camera) antenna. The MSC has a two-axes directional X-band antenna for image transmission to KGS(KOMSAT2 Ground Station). The main objective of the ATS is to drive the APM(Antenna Pointing Mechanism) to the required elevation and the azimuth position according to an appropriate TPF(Tracking Parameter File). The ATS is implemented as one task of the SBC(Single Board Computer) software, which uses VxWorks as a real time OS. The ATS has several operational modes such as STANDBY mode, First EL mode, First AZ mode, Normal Operation mode, and so on. The ATS uses two PI controllers fur the velocity and the position loop respectively, to satisfy the requirements specification. In order to show the feasibility of the described design concept, the various simulations and the experiments are performed under specific test configuration.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.5
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• pp.587-592
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• 2018

Because the brightness of an AMOLED is determined by the flowing current, each pixel of AMOLED operates via A current driving method. Therefore, it is necessary to supply power to adjust the amount of current according to THE user's requirement for AMOLED driving. In this study, an IP driver block was designed and a simulation was conducted for an AMOLED display, which supplies power as selected by users. The IP driver design focused on regulating the output power due to the OLED characteristics for the diode electric current according to the voltage to be activated by pulse-skipping mode (PSM) under low loads, and 1.5 MHz pulse-width modulation (PWM) for medium/high loads. The IP driver was designed to eliminate the ringing effects appearing from the dis-continue mode (DCM) of the step-up converter. The ringing effects destroy the power switch within the IC, or increase the EMI to the surrounding elements. The IP driver design minimized this through a ringing killer circuit. Mobile applications were considered to enable true shut-down capability by designing the standby current to fall below $1{\mu}A$ to disable it. The driver proposed in this paper can be applied effectively to the same system as the AMOLED display dual power management circuit.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.1
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• pp.15-19
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• 2001

Current leakage is the major failure mode of semiconductor device characteristic failures. Conventionally, failures such as short circuit breaks and gate breakdowns have been analyzed and the detected causes have been reflected in the fabrication process. By using a wafer-level emission-leakage failure analysis method (in-line QC), we analyzed leakage mode failure, which is the major failure detected during the probe inspection process for LSIs, typically DRAMs and CMOS logic LSIs. We have thus developed a new technique that copes with the critical structural failures and random failures that directly affect probe yields.

• Journal of the Korea Society of Computer and Information
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• v.21 no.10
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• pp.125-133
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• 2016

In this paper, we propose a real-time fault monitoring and dual system design of the countdown time-generating system, which is the main component of the mission control system. The countdown time-generating system produces a countdown signal that is distributed to mission control system devices. The stability of the countdown signal is essential for the main launch-related devices because they perform reserved functions based on the countdown time information received from the countdown time-generating system. Therefore, a reliable and fault-tolerant design is required for the countdown time-generating system. To ensure system reliability, component devices should be redundant and faults should be monitored in real time to manage the device changeover from Active mode to Standby mode upon fault detection. In addition, designing different methods for mode changeover based on fault classification is necessary for appropriate changeover. This study presents a real-time fault monitoring and changeover system, which is based on the dual system design of countdown time-generating devices, as well as experiment on real-time fault monitoring and changeover based on fault inputs.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.3A
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• pp.221-229
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• 2007

In this paper, we propose and analyze the optimized sleep mode for a mobile node (MN) in IEEE 802.16e wireless metropolitan area networks. Because a MN in a sleep mode specified in 802.16e specification should maintain state information with the base station currently attached, it must renew sleep state with a new base station after handover which leads to unnecessary waste of battery power. Noting that the mobility pattern of a MN is independent of call arrival patterns, we propose an optimized sleep mode to eliminate unnecessary standby period of a MN in sleep state after handover. We also propose an analytical model for the proposed scheme in terms of power consumption and the initial call response time. Simulation studies that compare the performance between the sleep mode and the optimized sleep mode show that our scheme marginally increases initial call response delay with the huge reduction in power consumption.

• Journal of IKEEE
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• v.18 no.4
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• pp.586-592
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• 2014

In this paper, high efficiency power management IC(PMIC) with DT-CMOS(Dynamic threshold voltage Complementary MOSFET) switching device is presented. PMIC is controlled PWM control method in order to have high power efficiency at high current level. The DT-CMOS switch with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuit consist of a saw-tooth generator, a band-gap reference(BGR) circuit, an error amplifier, comparator circuit, compensation circuit, and control block. The saw-tooth generator is made to have 1.2MHz oscillation frequency and full range of output swing from supply voltage(3.3V) to ground. The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on current mode PWM control circuits and low on-resistance switching device, achieved the high efficiency nearly 96% at 100mA output current. And Buck converter is designed along LDO in standby mode which fewer than 1mA for high efficiency. Also, this paper proposes two protection circuit in order to ensure the reliability.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.23-30
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• 2005

This paper describes a DLL(delay locked loop)-based multi-clock generator having the lower active stand-by power as well as a fast relocking after re-activating the DLL. for low power and high speed VLSI chip. It enables a frequency multiplication using frequency multiplier scheme and produces output clocks with 50:50 duty-ratio regardless of the duty-ratio of system clock. Also, digital control scheme using DAC enables a fast relocking operation after exiting a standby-mode of the clock system which was obtained by storing analog locking information as digital codes in a register block. Also, for a clock multiplication, it has a feed-forward duty correction scheme using multiphase and phase mixing corrects a duty-error of system clock without requiring additional time. In this paper, the proposed DLL-based multi-clock generator can provides a synchronous clock to an external clock for I/O data communications and multiple clocks of slow and high speed operations for various IPs. The proposed DLL-based multi-clock generator was designed by the area of $1796{\mu}m\times654{\mu}m$ using $0.35-{\mu}m$ CMOS process and has $75MHz\~550MHz$ lock-range and maximum multiplication frequency of 800 MHz below 20psec static skew at 2.3v supply voltage.