• Journal of Korea Multimedia Society
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• v.19 no.8
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• pp.1471-1478
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• 2016

In this study, the system to manage the power automatically was implemented by using Arduino, Raspberry pi, and Beacon technologies. Before the research, pre-research was carried out with the analysis on the existing power management systems in the market in order to find a solution to reduce burdens from standby power and power waste with the increase of electric charges. The system is designed to be able to deliver and receive data through IEEE 802.15.4 wireless protocol, by using Xbee module. Arduino was tested to verify whether it is able to control SSR(Solid State Relay), and it was found that there is no problem. Meanwhile, it was also tested whether it is possible to organize a star topology network through Arduino and Raspberry Pi, and it was confirmed that normal wireless communication is possible through IEEE 802.15.4 wireless protocol. It is designed that the signal from Android smartphone application is to be delivered to Raspberry Pi and then, to be delivered to Arduino through Xbee so that Arduino could control SSR. In addition to this, wireless protocol required to control Arduino with Raspberry Pi is also designed and applied to this research.

• 전자공학회논문지 IE
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• v.47 no.2
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• pp.1-7
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• 2010

This paper presents a low power digital PLL architecture and design for implementation of the PLL-based frequency synthesizers. In the proposed architecture, a wide band digital logic quadricorrelator is used for preliminary frequency detector and a narrow band digital logic quadricorrelator is used for final DCO control. Also, a circuit technique for reducing leakage current is adopted in order to minimize the standby mode power consumption of the deactivated block. The proposed digital PLL is designed and verified by MyCAD with MOSIS 1.8V $0.35{\mu}m$ CMOS technology, and the simulation results show that the power consumption can be lowered by more than 20%.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1155-1157
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• 2011

본 논문에서는 가전기기의 대기전력 저감을 위해 Capacitive Divider Power Supply(CDPS)로 전원을 공급받는 고효율 전원제어회로를 제안하였다. 이 제어회로는 220 V의 AC 전압을 높은 효율로 기기의 구동용 저전압 DC로 변환하기 위하여 기존의 변압기나 SMPS를 사용하는 대신 커패시터 분압기(Capacitive Divider)를 사용하여 전원을 공급하도록 제작되었으며, 대기 상태에서 교류전력선과 가전기기를 완전히 분리시킨 상태에서 적외선 수신기, MCU, 래치 타입 릴레이 등의 소자를 이용하여 기존 상용 리모컨으로도 전원제어가 가능하도록 설계되었다. 설계된 회로의 소비전력은 2.2 mW이며 본 논문에서 제안한 전원제어회로를 대기전력이 700 mW인 모니터에 적용하여 측정한 결과 대기전력이 7 mW로 낮아지는 것을 확인하였으며, 태양전지를 보조전원으로 추가 할 경우 태양전지에서 공급해주는 전력만큼 대기전력이 감소함을 확인하였다.

• Proceedings of the Korea Database Society Conference
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• 2010.06a
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• pp.33-41
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• 2010

Recently the number of IT equipment have increased. It consumes large amounts of energy and is emissions of greenhouse gases. Co2 emissions with the PC and the monitor has the highest percentage to 39% more than other IT equipment. In addition, Plan for your PC's power management and technology development is being pursued in developed countries. To reduce energy costs of organizations with large numbers of the PC and to cut down on Co2 emissions, the energy load control technology of ACPI standards-based PC IS suggested. AMI-based PC power-management system was constructed, Approximately 20% of operating a result of the test power consumption was reduced. Looking at the case of the United States, PC monitors from the University of Wisconsin-Oshkosh was Sleep mode. As a result, the monitor on a, $ 20 for a year reduced energy costs. In GE(General Electronic), Approximately 75,000 PC's power setting time was Monitor Off :15 minutes/ Hard Drives Off 30 minutes/ System Standby 30 minutes/ Hibernation mode 2 hours. 1 year, electric bill was $ 2.5 million savings and 3 years electric bill was $ 6.5 million savings. Measuring energy usage data, using the measured data, electric energy management technology is not. Platform development to measure energy usage for Individual energy-consuming equipment is urgently required.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.911-916
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• 2007

The home gateway, an equipment which works as an gateway for ubiquitous home network, relays all functions of a home network. The home gateway must always be connected in order to provide seamless services. However it gives unfavorable power consumption. Therefore the needs for working in maximum power saving mode while there is no data traffic and for invoking to the normal function when it is necessary. In this paper we survey the technical papers and the standards documents and provide an overview of power saving mode in the home gateway.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.4
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• pp.263-268
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• 2004

In this paper, we motivate the post-mask performance enhancement technique combined with the Multi-Threshold Voltage CMOS (MTCMOS) leakage current suppression technology, and integrate the new design issues related to the MTCMOS technology into the ASIC design methodology. The issues include short-circuit current and sneak leakage current prevention. Towards validating the proposed techniques, a Personal Digital Assistant (PDA) processor has been implemented using the methodology, and a 0.18um process. The fabricated PDA processor operates at 333MHz which has been improved about 23% at no additional cost of redesign and masks, and consumes about 2uW of standby mode leakage power which could have been three orders of magnitude larger if the MTCMOS technology was not applied.

• Proceedings of the KIPE Conference
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• 2013.11a
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• pp.218-219
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• 2013

본 논문은 가정용 전기기기의 대기전력을 보상하기 위해 에너지 하베스팅 시스템을 제안한다. 제안하는 에너지 하베스팅 방법을 주요 가전기기에 적용하여 각각의 사용 패턴 및 환경에 따른 발전량을 계산하고, 발전량과 대기전력을 고려하여 주요 가전기기에 전력을 공급하는 배터리가 포함된 전체 시스템을 구성한다. 이를 토대로 대기 전력량과 가전기기에 공급되는 전력량을 비교하여 제안하는 시스템의 타당성을 검증한다.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2010.07a
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• pp.273-275
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• 2010

우리나라는 점차 강화되고 있는 세계적인 연간 소비전력 제한 규제 및 정책에 발맞추어 Standby Korea 2010 정책으로 주요 전자기기의 대기전력을 1W미만으로 낮추는 전략을 추진하고 있다. 최근 아날로그 방송에서 디지털 방송으로 전환되고, IPTV 등이 빠르게 보급됨에 따라 향후 디지털 STB의 수요 및 시장이 크게 성장할 전망이다. 이에 본 논문은 Set-Top Box(STB) 소비전력 저감 효과를 높이기 위해 TV와 STB간 외부기기 연결 시 기존 Auto Power Down(APD)기법 대비 High Definition Multimedia Interface(HDMI) 포트 제어를 통한 제안 기법을 적용하여 연평균 전력 4~12% 저감 할 수 있다.

• Proceedings of the Korean Information Science Society Conference
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• 2012.06d
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• pp.378-380
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• 2012

본 논문은 사용하지 않는 공간에서 낭비되는 전기 에너지량을 감소시키기 위한 사용자 위치기반의 대기전력 제어시스템을 설계 및 구현한다. 사용자의 위치파악을 위해 주거시설의 해당 영역을 3개의 구역으로 분리하고 각 구역에 2개의 PIR센서를 설치하여 입 출입 현황 및 재실인원을 점검하며, 재실여부와 가전제품의 대기모드 여부에 따라 ZigBee 무선통신을 이용해 전력센서를 차단 혹은 해제한다. 또한, 시스템을 검증하기 위해 전력센서로 수집한 전력량을 대기전력의 차단과 해제로 비교하여 에너지 절감률을 분석한다.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.12
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• pp.64-70
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• 1994

In this paper, we inverstigated how a parricular internal inverter circuit, which is located far from the input protection in CMOS DRAM, can be easily damaged by external ESD stress, while the protection circuit remains intact. It is shown in a mega bit DRAM that the internal circuit can be safe from ESD by simply improving the input protection circuit. An inverter, which consists of a relatively small NMOSFET and a very large PMOSFET, is used to speed up DRAMs, and the small NMOSFET is vulnerable to ESD in case that the discharge current beyond the protection flows through the inverter to Vss or Vcc power lines on chip. This internal circuit damage can not be detected by only measuring input leakage currents, but by comparing the standby and on operating current before and after ESD stressing. It was esperimentally proven that the placement of parasitic bipolar transistor between input pad and power supply is very effective for ESD immunity.