• Title/Summary/Keyword: Standby

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Performance Analysis of BIM Labor using Case Analysis (사례분석을 활용한 시공단계 BIM 인력 투입 성과 분석)

  • Kim, Hyoung-Jin;Yoo, Moo-Young;Kim, Jae-Jun;Choi, Chang-Shik
    • Journal of KIBIM
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    • v.7 no.3
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    • pp.31-39
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    • 2017
  • BIM is effective to improve the labor productivity of construction participants. From this point of view, it is important to analyze the outcome related with BIM Labor which covers most of the BIM investment costs. This research focuses on BIM RFI which is one of the major task of the BIM labor and analyze the outcomes. In addition, this research was quantitatively analyzed by the standby time and related cost caused by BIM labor, which affect the results of the project participants. To this end, analytical standby queue model was utilized to analyze the labor focusing on micros TASK. 11 projects were selected to analyze the results of BIM labor and RFI that the project participants requested to the BIM labor was collected. Through this, it collected variables for analyzing results, and Finally, we pulled out 4 projects for analysis. In this study, the basic results analysis of RFI processing of the BIM labor, the probabilistic analysis of BIM labor service status, and the economic analysis of BIM labor optimal inputs were performed by using the research model presented. The results of this study can be utilized to formulate the optimal strategy for BIM labor inputs(e.g. number of employees, level, time point, etc.) of the construction phase. Moreover, it can contribute to ensuring the credibility of the BIM ROI results by presenting the cost of BIM services in BIM ROI analysis and the standby cost of project participants.

Design Considerations on the Standby Cooling System for the integrity of the CNS-IPA

  • Choi, Jungwoon;Kim, Young-ki
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.104-104
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    • 2015
  • Due to the demand of the cold neutron flux in the neutron science and beam utilization technology, the cold neutron source (CNS) has been constructed and operating in the nuclear research reactor all over the world. The majority of the heat load removal scheme in the CNS is two-phase thermosiphon using the liquid hydrogen as a moderator. The CNS moderates thermal neutrons through a cryogenic moderator, liquid hydrogen, into cold neutrons with the generation of the nuclear heat load. The liquid hydrogen in a moderator cell is evaporated for the removal of the generated heat load from the neutron moderation and flows upward into a heat exchanger, where the hydrogen gas is liquefied by the cryogenic helium gas supplied from a helium refrigeration system. The liquefied hydrogen flows down to the moderator cell. To keep the required liquid hydrogen stable in the moderator cell, the CNS consists of an in-pool assembly (IPA) connected with the hydrogen system to handle the required hydrogen gas, the vacuum system to create the thermal insulation, and the helium refrigeration system to provide the cooling capacity. If one of systems is running out of order, the operating research reactor shall be tripped because the integrity of the CNS-IPA is not secured under the full power operation of the reactor. To prevent unscheduled reactor shutdown during a long time because the research reactor has been operating with the multi-purposes, the introduction of the standby cooling system (STS) can be a solution. In this presentation, the design considerations are considered how to design the STS satisfied with the following objectives: (a) to keep the moderator cell less than 350 K during the full power operation of the reactor under loss of the vacuum, loss of the cooling power, loss of common electrical power, or loss of instrument air cases; (b) to circulate smoothly helium gas in the STS circulation loop; (c) to re-start-up the reactor within 1 hour after its trip to avoid the Xenon build-up because more than certain concentration of Xenon makes that the reactor cannot start-up again; (d) to minimize the possibility of the hydrogen-oxygen reaction in the hydrogen boundary.

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Core Circuit Technologies for PN-Diode-Cell PRAM

  • Kang, Hee-Bok;Hong, Suk-Kyoung;Hong, Sung-Joo;Sung, Man-Young;Choi, Bok-Gil;Chung, Jin-Yong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.2
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    • pp.128-133
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    • 2008
  • Phase-change random access memory (PRAM) chip cell phase of amorphous state is rapidly changed to crystal state above 160 Celsius degree within several seconds during Infrared (IR) reflow. Thus, on-board programming method is considered for PRAM chip programming. We demonstrated the functional 512Mb PRAM with 90nm technology using several novel core circuits, such as metal-2 line based global row decoding scheme, PN-diode cells based BL discharge (BLDIS) scheme, and PMOS switch based column decoding scheme. The reverse-state standby current of each PRAM cell is near 10 pA range. The total leak current of 512Mb PRAM chip in standby mode on discharging state can be more than 5 mA. Thus in the proposed BLDIS control, all bitlines (BLs) are in floating state in standby mode, then in active mode, the activated BLs are discharged to low level in the early timing of the active period by the short pulse BLDIS control timing operation. In the conventional sense amplifier, the simultaneous switching activation timing operation invokes the large coupling noise between the VSAREF node and the inner amplification nodes of the sense amplifiers. The coupling noise at VSAREF degrades the sensing voltage margin of the conventional sense amplifier. The merit of the proposed sense amplifier is almost removing the coupling noise at VSAREF from sharing with other sense amplifiers.

Design and Implementation of Standby Power Control Module based on Low Power Active RFID (저 전력 능동형 RFID 기반 대기 전력 제어 모듈 설계 및 구현)

  • Jang, Ji-Woong;Lee, Kyung-Hoon;Kim, Young-Min
    • The Journal of the Korea institute of electronic communication sciences
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    • v.10 no.4
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    • pp.491-497
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    • 2015
  • In this paper a method of design and Implementation of RFID based control system for reducing standby power consumption at the power outlet is described. The system is composed of a RF controlled power outlet having relay and an active RFID tag communicating with the RF reader module controlling the relay. When the tag carried by human approaches to the RF reader the reader recognizes the tag and switch off the relay based on the RSSI level measurement. A low power packet prediction algorithm has been used to decrease the DC power consumption at both the tag and the RF reader. The result of experiment shows that successful operation of the relay control has been obtained while low power operation of the tag and the reader is achieved using above algorithm. Also setting the distance between the reader and the tag by controlling transmission power of the tag and adjusting the duty cycle of the packet waiting time when the reader is in idle state allows us to reduce DC power consumption at both the reader and the tag.

Redundancy operation method for a distributed public address system (분산형 전관방송 시스템의 이중화 운영 방법)

  • Ryu, Taeha;Kim, Seungcheon
    • Journal of the Korea Convergence Society
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    • v.11 no.8
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    • pp.47-53
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    • 2020
  • In the case of a failure due to equipment deterioration in the public address system or a worker's mistake during construction, broadcasting becomes impossible. In this situation, we have designed a more advanced management broadcast system that can broadcast. The broadcasting service is operated using main broadcasting device, and local broadcasting device operates separately only in the local area. If the main broadcasting device becomes inoperable, the procedure for transferring the control activates the device with the local broadcasting devices based on data backed up by the main controller. This paper proposes an improved method of the conventional emergency broadcasting device duplication method. The existing method could not use the standby equipment in the normal state, but in the proposed method, the standby equipment can be used as local broadcasting equipment in usually. This method enables stable system operation while minimizing resource waste due to redundant configuration of expensive devices.

Design of New Smart Switch with Remote Power Control and Standby Power Management Function (원격 전력제어 및 대기전력 관리 기능을 갖는 새로운 스마트 스위치 설계)

  • Lee, Yong-An;Kim, Kang-Chul;Han, Seok-Bung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.10
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    • pp.2343-2350
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    • 2010
  • In this paper, new smart switch that can monitor and control the power consumption and standby power in real-time by implementing an embedded web-server is proposed. The proposed switch can perform the following functions: measuring the electric power like commercial smart meter product, monitoring the power consumption in real-time in distant places through wire and wireless devices, and finally controlling ON/OFF of each switch. In addition, it also contains auto power-shutoff functions for standy power, overvoltage and overcurrent just like existing power-saving outlet and mulitap. Finally, the proposed smart switch has lower hardware and power consumption than the existing products and can be commercialized as a small-sized product by using exclusive embedded web-server of its own, rather than using PC for monitoring and remote control.

MBus: A Fully Synthesizable Low-power Portable Interconnect Bus for Millimeter-scale Sensor Systems

  • Lee, Inhee;Kuo, Ye-Sheng;Pannuto, Pat;Kim, Gyouho;Foo, Zhiyoong;Kempke, Ben;Jeong, Seokhyeon;Kim, Yejoong;Dutta, Prabal;Blaauw, David;Lee, Yoonmyung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.6
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    • pp.745-753
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    • 2016
  • This paper presents a fully synthesizable low power interconnect bus for millimeter-scale wireless sensor nodes. A segmented ring bus topology minimizes the required chip real estate with low input/output pad count for ultra-small form factors. By avoiding the conventional open drain-based solution, the bus can be fully synthesizable. Low power is achieved by obviating a need for local oscillators in member nodes. Also, aggressive power gating allows low-power standby mode with only 53 gates powered on. An integrated wakeup scheme is compatible with a power management unit that has nW standby mode. A 3-module system including the bus is fabricated in a 180 nm process. The entire system consumes 8 nW in standby mode, and the bus achieves 17.5 pJ/bit/chip.