• Korean Journal of Optics and Photonics
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• v.32 no.1
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• pp.1-8
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• 2021

We have studied a tiled-aperture coherent-beam-combining system based on constructive interference, as a way to overcome the power limitation of a single laser. A 1-watt-level, 3-channel coherent fiber laser and a 3-channel fiber array of triangular tiling with tip-tilt function were developed. A monitoring system, phase controller, and 3-channel phase modulator formed a closed-loop control system, and the SPGD algorithm was applied. Eventually, phase-locking with a rate of 5-67 kHz and peak-intensity efficiency comparable to the ideal case of 53.3% was successfully realized. We were able to develop the essential elements for a tiled-aperture coherent-beam-combining system that had the potential for highest output power without any beam-combining components, and a multichannel coherent-beam-combining system with higher output power and high speed is anticipated in the future.

• Journal of IKEEE
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• v.2 no.1 s.2
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• pp.1-14
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• 1998

In this paper, Antenna, LNA, Mixer, VCO, and Modulation/Demodulation in Baseband processor which are the RF main components in Wireless LAN system for ultra high-speed communications network are studied. Antenna bandwidth and selective fading due to multipath can be major obstacles in high speed digital communications. To solve this problem, wide band MSA which has loop-structure magnetic antenna characteristics is designed. Distributed mixer using dual-gate GaAs MESFET can achieve over 10dB LO/RF isolation without hybrid, and minimize circuit size. As linear mixing signal is produced, distortions can be decreased at baseband signals. Conversion gain is achieved by mixing and amplification simultaneously. Mixer is designed to have wide band characteristics using distributed amplifier. In VCO design, Oscillator design method by large signal analysis is used to produce stable signal. Modulation/Demodulation system in baseband processor, DS/SS technique which is robust against noise and interference is used to eliminate the effect of multipath propagation. DQPSK modulation technique with M-sequences for wideband PN spreading signals is adopted because of BER characteristic and high speed digital signal transmission.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.11
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• pp.1264-1271
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• 2012

Fast tracking is important for high-speed data transmission in high-speed mobile environment such as high speed rail and vehicular. Digital retrodirective array antenna is possible to do automatically beam tracking because it can control the phase information of the output signal toward opposite direction to input signal without no a priori knowledge of the arrival direction. Also, Digital retrodirective array antennas has merit that it is easy to upgrade and modify compare with analogue retrodirective array antennas. In this paper, we analyze the BER performance of digital retrodirective array antenna under AWGN environment and multipath signal. Simulation results show correct phase estimation and conjugation of retrodirective array antenna by using phase detector block. Also, phase conjugation technique has better BER performance about 1 dB at source than that of without phase conjugation when phase lag is $15^{\circ}$ in AWGN environment. This paper also discusses effect of the presence of multipath signal. Phase and amplitude error about direction of direct signal occurs when retrodirective array system is affected by interference and multipath signal in the presence of multipath signal.

• Journal of Advanced Navigation Technology
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• v.16 no.3
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• pp.480-487
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• 2012

In Busan, the structural limitations of the road, is causing severe traffic congestion and low speed of the vehicle. So the existing traffic control system needs improvements to its structure. A study on Optimal Traffic Signal System and Improvement for User Oriented Public Transit Service are required. U-city is a city or region with ubiquitous information technology. All information systems are linked, and virtually everything is linked to an information technologies. U-Traffic goal is to maximize of traffic information services based on advanced information technology to integrate of transportation infrastructure. The objectives of this research are : a vehicle detection method through a variety of sensors, an algorithm of the traffic signal system, a design and implementation a simulator to compare between the fixed traffic signal and adaptive traffic signal system. This simulator will have allowed analysis techniques for the study of traffic control. Results of simulator test shows that traffic congestion can be some reduce.

• Journal of the Korean Society for Railway
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• v.18 no.3
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• pp.232-240
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• 2015

Two types of track circuits are used in high speed railway car depots: one is High Voltage Impulse Track Circuit(HVITC); the other is AF track circuit. HVITC detects train occupation of blocks and broken rail; the AF track circuit is used for train onboard control system pretesting before departure. This testing is used to transmit train control information through the AF track circuit. The two systems are switched in turns for testing. We propose a system in which the AF track circuit is replaced by a loop cable that is installed on the inside rail; as such, engineers do not need to switch the systems. In cases in which the two systems run simultaneously, mutual interference may occur. In this paper, we identified this mutual interference by modeling of the two circuits.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.60-67
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• 2010

We designed Average Current Control PFC IC which has make the average value of boost inductor current became the shape of sine wave. Designed IC has fixed frequency of 75kHz to meet EMI standard requirement. And also RC compensation loop has been designed into the error amp and the current amp, in order that it has wide bandwidth for high speed control. And we use the oscillator which generates by square wave and triangle wave, and add to UVLO, OVP, OCP, TSD which is in order to operate stability. We simulated by using Spectre of Cadence to verify the unity power factor function and various protection circuits and fabricated in a $1{\mu}m$ High Voltage(20V) CMOS process.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.5
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• pp.62-70
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• 2007

In this paper, the boost Power Factor Correction(PFC) technique for Direct Torque Control(DTC) of brushless DC motor drive in the constant torque region is implemented on a TMS320F2812DSP. Unlike conventional six-step PWM current control, by properly selecting the inverter voltage space vectors of the two-phase conduction mode from a simple look-up table at a predefined sampling time, the desired quasi-square wave current is obtained, therefore a much faster torque response is achieved compared to conventional current control. Furthermore, to eliminate the low-frequency torque oscillations caused by the non-ideal trapezoidal shape of the actual back-EMF waveform of the BLDC motor, a pre-stored back-EMF versus position look-up table is designed. The duty cycle of the boost converter is determined by a control algorithm based on the input voltage, output voltage which is the dc-link of the BLDC motor drive, and inductor current using average current control method with input voltage feed-forward compensation during each sampling period of the drive system. With the emergence of high-speed digital signal processors(DSPs), both PFC and simple DTC algorithms can be executed during a single sampling period of the BLDC motor drive. In the proposed method, since no PWM algorithm is required for DTC or BLDC motor drive, only one PWM output for the boost converter with 80 kHz switching frequency is used in a TMS320F2812 DSP. The validity and effectiveness of the proposed DTC of BLDC motor drive scheme with PFC are verified through the experimental results. The test results verify that the proposed PFC for DTC of BLDC motor drive improves power factor considerably from 0.77 to as close as 0.9997 with and without load conditions.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.7 s.337
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• pp.35-40
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• 2005

This paper proposes a fractional-N phase-locked loop (PLL) frequency synthesizer using the 3rd order ${\Delta}{\sum}$ modulator for 900MHz medium speed wireless link. The LC voltage-controlled oscillator (VCO) is used for the good phase noise property. To reduce the lock-in time, a charge pump has been developed to control the pumping current according to the frequency steps and the reference frequency is increased up to 3MHz. A 36/37 fractional-N divider is used to increase the reference frequency of the phase frequency detector (PFD) and to reduce the minimum frequency step simultaneously. A 3rd order ${\Delta}{\sum}$ modulator has been developed to reduce the fractional spur VCO, Divider by 8 Prescaler, PFD and Charge pump have been developed with 0.25um CMOS, and the fractional-N divider and the third order ${\Delta}{\sum}$ modulator have been designed with the VHDL code, and they are implemented through the FPGA board of the Xilinx Spartan2E. The measured results show that the output power of the PLL is about -lldBm and the phase noise is -77.75dBc/Hz at 100kHz offset frequency. The minimum frequency step and the maximum lock-in time are 10kHz and around 800us for the maximum frequency change of 10MHz, respectively.

• Smart Structures and Systems
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• v.20 no.4
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• pp.483-498
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• 2017

Real-Time Hybrid Simulation (RTHS) is a powerful and cost-effective dynamic experimental technique. To implement a stable and accurate RTHS, time delay present in the experiment loop needs to be compensated. This delay is mostly introduced by servo-hydraulic actuator dynamics and can be reduced by applying appropriate compensators. Existing compensators have demonstrated effective performance in achieving good tracking performance. Most of them have been focused on their application in cases where the structure under investigation is subjected to inputs with relatively low frequency bandwidth such as earthquake excitations. To advance RTHS as an attractive technique for other engineering applications with broader excitation frequency, a discrete-time feedforward compensator is developed herein via various optimization techniques to enhance the performance of RTHS. The proposed compensator is unique as a discrete-time, model-based feedforward compensator. The feedforward control is chosen because it can substantially improve the reference tracking performance and speed when the plant dynamics is well-understood and modeled. The discrete-time formulation enables the use of inherently stable digital filters for compensator development, and avoids the error induced by continuous-time to discrete-time conversion during the compensator implementation in digital computer. This paper discusses the technical challenges in designing a discrete-time compensator, and proposes several optimal solutions to resolve these challenges. The effectiveness of compensators obtained via these optimal solutions is demonstrated through both numerical and experimental studies. Then, the proposed compensators have been successfully applied to RTHS tests. By comparing these results to results obtained using several existing feedforward compensators, the proposed compensator demonstrates superior performance in both time delay and Root-Mean-Square (RMS) error.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.8
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• pp.14-25
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• 2002

In this paper, we propose a modified AFC algorithm which is suitable for the implementation of WCDMA reverse link receiver modem. To reduce the complexity, the modified CP-FDD algorithm named 'Normalized CP-FDD' is applied to the AFC loop. The proposed FDD algorithm overcomes the conventional CP-FDD's sensitivity to the variance of input signal amplitude and increases the linear range of S -curve. Therefore, offset frequency estimation using the proposed scheme can be more stable than the conventional method. Unlike IS-95, since pilot symbol in WCDMA is not transmitted continuously, we introduce a moving average filter at the FDD input to increase the number of cross-product. So, tracking speed and stability are improved. For more rapid frequency acquisition and tracking, we adopt a multi-stage tracking mode. Using NCO having ROM table structure, the frequency offset is compensated. We applied the proposed algorithm in the implementation of WCDMA base station modem successfully.