• 조명전기설비학회논문지
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• 제23권9호
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• pp.124-129
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• 2009

최근 자동차 및 자동화 등 많은 첨단 산업분야에서 산업용 모터 정밀 제어를 위한 인버터의 요구가 증가하고 있다. 본 논문에서는 FPGA를 이용하여 단일 제어 유닛으로 여러 개의 모터를 제어할 수 있는 SVPWM 모듈을 설계 제작하여 모터 정밀제어에 응용하고자 한다. 개발된 WVPWM 모듈에는 PWM 발생기뿐만 아니라 위치 및 전류센서 처리 부분과 데프타임 보상기 알고리즘도 함께 구현되었다. 개발 툴은 ALTERA Quartus 8.0을 사용하였으며 시뮬레이션에 의해 동작 특성을 검증하였고 실험을 통해 성능을 검증하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2013년도 전력전자학술대회 논문집
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• pp.260-262
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• 2013

본 논문에서는 2상 유도전동기의 가변속장치인 3-레그 2상 인버터의 PWM 방식을 공간벡터제어 방식으로 제안하였다. 기존의 3-레그 인버터의 PWM방식은 전형적인 SVPWM 방식을 적용하여 PWM 방식이 복잡하다. 본 논문에서는 3상 PWM 옵셋전압방식을 응용하여 2상 인버터에 적용하여 기존의 공간 벡터(space vector) PWM(SVPWM) 방식방식을 단순화 시킨 것이다. 제안된 3-레그 인버터의 PWM방식에 대한 타당성을 확인하기 위해 모의 실험과 실험이 실행되었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.168-174
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• 2001

In this paper, a new space vector RPPWM (Random Position PWM) is proposed. In the proposed RPPWM, each of three phase pulses is located randomly in each switching interval. Based on the space vector modulation technique, the duty ratio of the pulses is calculated. Along with the randomization of the PWM pulses, we can obtain the effects of spread spectra of voltage, current as in the case of randomly changed switching frequency. To verify the validity of the proposed RPPWM, simulation study was tried using Matlab/simulink. The main model described in Simulink block diagrams includes the space vector modulation block, pulse position randomization block, inverter block, 3 phase induction motor block, and so on. By the simulation study, the harmonics of the output voltage, and the current of inverter are predicted in different PWM methods- SVPWM, LLPWM, proposed RPPWM.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.343-346
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• 2002

In recent, complex SVPWM (Space Vector PWM) algorithm can be easily implemented by high performance microprocessor and DSP. Various SVPWM techniques are widely studied due to the advantages of low harmonic distortion and high use ratio of D.C. link voltage. Most of various studies for improving of VS-PWM inverter performance are concentrated about switching pattern and zero pulse pattern split algorithms. However, dc link voltage that is determined at rated load and speed conditions is not proper in the low speed and under rated load. In this paper, analysis of current ripple with digitally implemented SVPWM inverter is introduced according to link voltage. The optimal link voltage in the designed inverter system and load condition is provided in order to suppress output voltage error and current ripple. As remaining the effective voltage vector interval per sampling period sufficiently, additional voltage error and current ripple are suppressed. The proposed algorithm is verified through digital simulation and experimental results.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.625-629
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• 2004

This paper presents a systematical approach to study carrier based PWM techniques (CPWM) in diode-clamped and cascade multilevel inverters by using a proposed named multi-modulating pattern method. This method is based on the vector correlation between CPWM and the space vector PWM (SVPWM) and applicable to both multilevel inverter topologies. A CPWM technique can be described in a general mathematical equation, and obtain the same outputs similarly as of the corresponding SVPWM. Control of the fundamental voltage, vector redundancies and phase redundancies in multilevel inverter can be formulated separately in the CPWM equation. The deduced CPWM can obtain the full vector redundancy control, and fully utilize phase redundancy in a cascade inverter In this continued part, it will be deduced correlation between CPWM equations in multi-carrier system and single carrier system, present the mathematical model of voltage source inverter related to the common mode voltage and propose a general algorithm for multi-modulating modulator. The obtained theory will be demonstrated by simulation results.

• 전력전자학회논문지
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• 제6권6호
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• pp.525-537
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• 2001

본 연구에서는 펄스의 위치를 랜덤하게 함으로써 효율적은 RPWN (Random PWM)을 구현할 수 있는 새로운 공간 벡터 RPPWM(Random Position PWM)방식을 제안하였다. 제안한 방식은 마이크로 컨트롤로 적용하기 쉬운 공간벡터 변조에 의하여 각 상의 듀티비를 연산한 다음, 스위칭 순서를 유지하며 각 3상 펄스들의 위치를 변조구간내에서 임의의 위치에 랜덤하게 배치함으로써 RPWM을 구현하는 방식이다. 제안된 방법의 타당성을 검증하기 위하여 MATLAB/SIMULINK를 이용하여 펄스위치의 랜덤화 공각벡터 변조, 인버터 및 3상 유도전동기를 포함하는 전체 시스템을 모델화하였다. 종전의 공각벡턱 PWM 그리고 제안된 RPPWM에 의한 인버터 출력 전압 전류의 고조파 성분을 시뮬레이션에 의하여 비교 검토하였으며 제안된 방법의 유용성을 입증할 수 있었다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.413-416
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• 2000

본논문에서는 유도전동기 속도 및 토크 제어시 고조파의 왜형률을 감소시키고 디지털 구현이 용이하며 선형제어 영역을 증가시킬 수 있는 스위칭 방식으로 Space voltage Vector PWM(Pulse Width Modulation) 설명하였으며 시뮬레이션하기 위한 user_tool로써 Matlab/Simulink를 이용하여 SVPWM을 구현하는 방법을 설명하였다 결과적으로 개루프 운전 시 유도기에 인가되는 기준전압을 각각 비과변조와 과변조 시 전압비율 변경방식을 사용하여 나타나는 응답으로 가상스위칭 시간 T1, T2, T0 와 속도, 상전류, 토크응답을 알아보았다.

• 전력전자학회논문지
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• 제19권6호
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• pp.488-493
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• 2014

This paper presents a carrier-based pulse-width modulation(PWM) method for reducing the common-mode voltage of a three-level four-leg converter. The idea of the proposed PWM method is intuitive and easy to be implemented in digital signal processor-based converter control systems. On the basis of the analysis of space-vector PWM(SVPWM) and sinusoidal PWM(SPWM) switching patterns, the fourth leg pole voltage of the three-phase converter called "f leg pole voltage" is manipulated to reduce the common-mode voltage. To synthesize f leg pole voltage for the suppression of the common-mode voltage, positive and negative pole voltage references of f leg are calculated. An offset voltage is also deduced to prevent the distortion of a, b, and c phase voltages. The feasibility of the proposed PWM method is verified by simulation and experimental results. The common-mode voltage of the proposed PWM method in peak-to-peak value is 33% in comparison with that of the conventional SVPWM method. The transition number of the common-mode voltage is also reduced to 25%.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제49권9호
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• pp.618-625
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• 2000

Recently PWM inverters are widely utilized for many industrial applications e.g. high performance motor drive and PWM techniques are newly developed for an accurate output voltage. Among them space voltage vector PWM(SVPWM) inverter has high voltage ratio and low harmonics compared to the conventional sinusoidal PWM inverter. However output voltage of PWM inverter is distorted and has error duet o the conducting voltage drop of switching devices and the dead time that is inevitable to prevent the shoot-through phenomenon. This paper investigates 3-phase SVPWM inverter which has a new compensation method against dead time and voltage drop. Proposed algorithm calculates gate pulse periods which directly compensates the dead time and nonlinear voltage drop without modification of reference voltages. Direct compensation of gate pulse periods produces exact output voltage and does not need additional circuits. The propose algorithm is verified through the simulation and experiments.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2020년도 전력전자학술대회
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• pp.106-108
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• 2020

This paper introduces a new pulse-width modulation (PWM) method to reduce common-mode voltages (CMVs) and compare its performance with other reduced CMV-PWM (RCMV-PWM) methods. To avoid the use of zero-vectors which cause high CMV peaks, the introduced method splits every reference vector into two vectors such that the peak-to-peak magnitude of CMV is reduced by one-third of conventional space-vector PWM (SVPWM). The performance of RCMV-PWMs altered by the modulation index are analyzed with simulation results.