• Journal of Power Electronics
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• v.19 no.6
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• pp.1380-1392
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• 2019

Input filters are very important to matrix converters (MCs). They are used to improve grid side current waveform quality and to reduce the input voltage distortion supplied to the grid side. Due to the effects of the input filter and the output power, the grid side power factor (PF) is not at unity when the input power factor angle is zero. In this paper, the displacement angle between the grid side phase current and the phase voltage affected by the input filter parameters and output power is analyzed. Based on this, a new grid side PF unity compensation method implemented in the indirect space vector pulse width modulation (ISVPWM) method is presented, which has a larger compensation angle than the traditional compensation method, showing a higher grid side PF at unity in a wide output power range. Simulation and experimental results verify that the analysis of the displacement angle between the grid side phase current and the phase voltage affected by the input filter and output power is right and that the proposed compensation method has a better grid side PF at unity.

• Journal of Power Electronics
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• v.19 no.1
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• pp.244-253
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• 2019

Finite control set model-predictive control (FCS-MPC) has received increasing attentions due to its outstanding dynamic performance. It is being widely used in power converters and multilevel inverters. However, FCS-MPC requires a lot of calculations, especially for multilevel-cascaded H-bridge (CHB) static synchronous compensators (STATCOMs), since it has to take account of all the feasible voltage vectors of inverters. Hence, an improved five-segment space vector pulse width modulation (SVPWM) method based on the non-orthogonal static reference frames is proposed. The proposed SVPWM method has a lower number of switching states and requires fewer computations than the conventional method. As a result, it makes FCS-MPC more efficient for multilevel cascaded H-bridge STATCOMs. The partial cost function is adopted to sequentially solve for the reference current and capacitor voltage. The proposed FCS-MPC method can reduce the calculation burden of the FCS-MPC strategy, and reduce both the switching frequency and power losses. Simulation and experimental results validate the excellent performance of the proposed method when compared with the conventional approach.

• Proceedings of the KIPE Conference
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• 2020.08a
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• pp.106-108
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• 2020

This paper introduces a new pulse-width modulation (PWM) method to reduce common-mode voltages (CMVs) and compare its performance with other reduced CMV-PWM (RCMV-PWM) methods. To avoid the use of zero-vectors which cause high CMV peaks, the introduced method splits every reference vector into two vectors such that the peak-to-peak magnitude of CMV is reduced by one-third of conventional space-vector PWM (SVPWM). The performance of RCMV-PWMs altered by the modulation index are analyzed with simulation results.

• Proceedings of the KIPE Conference
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• 2004.11a
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• pp.64-69
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• 2004

This paper deals with an algorithm for controlling ac output voltage of Z-source inverter using Modified SVPWM (abbreviated as MSVPWM). Unlike the conventional space vector pulse width modulation, MSVPWM has one extra shoot-through zero time $T_{sh}$. During shoot-through zero time, both switches in a leg are conducted simultaneously in order to boost inverter output voltage to any desirable value regardless the line voltage. The algorithm to control linearly the capacitor voltage is suggested to improve the performance of Z-source inverter system. The performance of Z-source inverter using above algorithms is demonstrated in simulation results using PSIM. Index terms-Z-source inverter (ZSI), shoot-through time, three-phase carrier-based PWM, space vector PWM (SVPWM), modified space vector PWM (MSVPWM).

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.6
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• pp.610-617
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• 2011

This paper proposes a novel and direct dead-time compensation method of the 3-phase inverter using space vector pulse width modulation(SVPWM) topology. The proposed dead-time compensation method directly compensates the dead-time to the turn-on time of the effective voltage vector according to the current direction of the medium voltage reference. Each phase voltages are determined by the switching times of the effective voltage vectors, and the practical switching times have loss according to the current direction by the dead-time effect in the 3-phase inverter. The proposed method adds the dead-time to the switching time of the effective voltage vector according to the current direction, so it does not require complex d-q transform and controller to compensate the voltage error. The proposed dead-time compensation scheme is verified by the computer simulation and experiments of 3-phase R-L load.

• Journal of Power Electronics
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• v.2 no.4
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• pp.288-296
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• 2002

In this paper, a high frequency transformer - assisted auxiliary active resonant commutated snubber (HFTA-ARCS) for voltage source soft switching pulse width modulated power conversion circuits is presented. A three phase voltage source type soft switching inverter incorporating HFTA-ARCS circuits in its three bridge legs can reduce current rating of auxiliary active power switches and has sensorless simplified control scheme which any specified boost current management is not required for soft switching. Its operation principle and digital control scheme are described and a practical design method of circuit parameters on this HFTA-ARCS circuit is also introduced on the basis of computer simulation. Moreover, this space voltage vector modulated soft switching inverter system with DSP-based digital control scheme Is discussed and its effectiveness is proved on the basis of performance evaluations. The operating performances of this inverter system are also compared with those of conventional three-phase hard switching inverter under practical conditions of specified parameters.

• Journal of Power Electronics
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• v.15 no.5
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• pp.1235-1243
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• 2015

This paper presents a modified Space Vector Pulse Width Modulation Technique (SVPWM), which solves the well-known problem of voltage imbalance in the capacitors of a single-phase multilevel inverter. The proposed solution is based on the measurement of DC voltage levels at each capacitor of the inverter DC bus. The measurements are then used to adjust the size of the active vectors within the SVPWM algorithm to keep the voltage waveform sinusoidal regardless of any voltage imbalance on the DC link capacitors. When a voltage deviation exceeds a predetermined hysteresis band, the correspondent voltage vector is restricted to restore the voltage level to an acceptable threshold. Hence, the need for external voltage regulators for the voltage capacitors is eliminated. The functionality of the proposed algorithm is successfully demonstrated through simulations and experiments on a grid tied application.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.7
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• pp.352-360
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• 2003

This paper deals with a simple method in order to analyze and compare the harmonic characteristics in the multi-level inverter. Generally, the magnitude of harmonic components becomes different according to the multi-carrier Pulse Width Modulation(PWM) techniques, the modulation index($M_i$) and the switching frequency The previous papers analyzed the harmonic characteristics from the viewpoint of the space voltage vector. Hence, the calculation of the harmonic vector becomes more difficult and complex in 4-level or over 5-level. However, the proposed method has reduced an amount of calculation and simplified the process of it, using the relationship between the reference voltage and the output phase voltage to the load neutral point. It is applied to the 5-level cascade inverter and the harmonic characteristics for each multi-carrier PWM technique are compared through the simulation.

• Proceedings of the KIPE Conference
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• 2020.08a
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• pp.330-331
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• 2020

In this paper, we propose a new three-dimension space vector pulse width modulation for three-phase four-wire inverter under line-to-line fault. In order to this method, the processes of selecting of the output voltage vectors and synthesizing the reference voltage vector are discussed. In addition, we deal with the calculation of the duty cycles for each sector. The experiments are provided to validate the effectiveness of the proposed method.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2258-2271
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• 2016

In this paper, some crucial performance characteristics related to the operational reliability of the post-fault Pulse Width Modulated (PWM) rectifiers, such as line current harmonic distortion, Common Mode Voltage (CMV), and current stress on the capacitors, are fully investigated. The aforementioned performance characteristics of post-fault rectifiers are highly dependent on the utilized space vector modulation (SVM) schemes, which are also examined. Detailed analyses of the three most commonly used SVM schemes for post-fault PWM rectifiers are provided, revealing the major differences in terms of the zero vector synthesis approaches. To compare the performances of the three SVM schemes, the operating principles of a post-fault rectifier are presented with various SVM schemes. Using analytical and numerical methods in the time domain, the performances of the line current distortion, common mode voltage and capacitor current are evaluated and compared for each SVM scheme. The proposed analysis demonstrates that the zero vector synthesis approaches of the considered methods have significant impacts on the performance characteristics of rectifiers. In addition, the advantages and disadvantages of the proposed SVM schemes are discussed. The experimental results verify the effectiveness and validity of the proposed analysis.