• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1122-1124
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• 2009

Organic thin-film transistors (OTFTs) were fabricated by using the transfer patterning method. In order to remove Au pattern easily, UV-curable polymer mold was surface treated. Au source/drain (S/D) pattern was transferred to insulator-coated substrate surface. Fabricated OTFTs were compared to OTFTs using vacuum-deposited Au S/D. Additionally, transistor diodes were characterized.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.7
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• pp.127-133
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• 1996

In this paper, we propose a new fabrication method for poly-Si TFTs with a self-aligned offset gated structure by employing a photoresist reflow process. Compared with the conventional poly-Si TFTs, the device is consist of two gate electrodes, of which one is the entitled main gate where the gate bias is employed and the other is the entitled subgate which is separate form both sides of the main gate. The poly-Si channel layer below the offset oxide is protected form the injected ion impurities for the source/drain implantation and acts as an offset region of the proposed device. The key feature of oru new device is the offset region due to the offset oxide. our experimental reuslts show that the offset region, due to the photoresist reflow process, has been sucessfully obtained in order to fabricate the offset gated poly-Si TFTs. The maximum ON/OFF ratio occurs at the L$_{off}$ of 1.1${\mu}$m and exceeds 1X10$^{6}$.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1135-1138
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• 2006

By ink-jet printing method, organic thin-film transistors (OTFTs) having soluble 6,13-bis (triisopropylsilylethynyl) pentacene (TIPS pentacene) as an active material were fabricated. The TIPS pentacene solution was made with chlorobenzene and anisole. The solutions were printed on poly (4-vinylphenol) (PVP) dielectric layers and source/drain electrodes by piezo-type heads for bottom contact OTFTs. The dielectric layers had untreated or HMDS-treated conditions. The chlorobenzene device showed the highest field effect mobility of $0.016\;cm^2/Vs$ and the anisole HMDS-treated device shows the highest $I_{on}/I_{off}$ ratio of $10^5$.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1413-1415
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• 2005

The OTFT performance depends strongly on the interfacial properties between an organic semiconductor and ${\alpha}$ metal electrode. The contact resistance is critical to the current flow in the device. The contact resistance arises mainly from the Schottky barrier formation due to the work function difference between the semiconductor and electrodes. We doped pentacene/source-drain interfaces with $F_4TCNQ$ (2,3,5,6-Tetrafluoro-7,7,8,8-tetracyanoquinodimethane), resulting in p-doped region at the SD contacts, in order to solve this problem. We found that the mobility increased and the threshold voltage decreased.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2018.06a
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• pp.142.1-142.1
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• 2018

This research presents a new field effect transistor (FET) by using liquid crystal gate dielectric with remote gate. The fabrication of thin-film transistors (TFTs) was used Indium tin oxide (ITO) for the source, drain, and gate electrodes, and indium gallium zinc oxide (IGZO) for the active semiconductor layer. 5CB liquid crystal was used for the gate dielectric material, and the remote gate and active layer were covered with the liquid crystal. The output and transfer characteristics of the LC-gated TFTs were investigated.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.629-632
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• 2008

Printed organic thin-film transistors (OTFTs) were used in the fabrication of a screen- printed gate, source and drain electrodes on flexible plastic substrates using silver pastes, a coated polyvinylphenol dielectrics, and jetted bis(triisopropyl-silylethynyl) pentacene (TIPS-pentacene) organic semiconductor. The OTFTs printed using screen printing and soluble processes made it was possible to fabricate a printed OTFT with a channel length as small as $13\;{\mu}m$ on plastic substrates; this was not possible using previous traditional printing techniques.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.874-876
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• 2009

This is a report on fabrication and electrical characteristics of pentacene OTFT that uses conducting PEDOT/PSS as source drain electrodes. We demonstrate enhanced conductivity of PEDOT/PSS film with glycerol and optimize properties for ink jet printing. We also present the application of oxygen plasma technique in order to favor selective spreading for subsequent inkjet printing.

• Journal of the Semiconductor & Display Technology
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• v.20 no.2
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• pp.82-86
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• 2021

In this study, we investigated the oxygen partial pressure effect of ITO films for electrodes of oxide-based Thin-Film Transistor (TFT). Firstly, we deposited single ITO films on the glass substrate at room temperature. ITO films were prepared at the various partial pressures of oxygen gas 0-7.4% (O₂/(Ar+O₂)). As increasing oxygen on the process of film deposition, electrical properties were improved and optical transmittance increased in the visible light range (300-800 nm). For the electrode of TFT, we fabricated a TFT device (W/L=1000/200 ㎛) with ITO films as the source and drain electrode on the silicon wafer. Except for the TFT device combined with ITO film prepared at the oxygen partial pressure ratio of 7.4%, We confirmed that TFT devices with ITO films via FTS system operated as a driving device at threshold voltage (V_th) of 4V.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.344-344
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• 2014

Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.

• Journal of Sensor Science and Technology
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• v.23 no.2
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• pp.114-121
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• 2014

We report a polysilicon active area membrane field effect transistor (PSAFET) pressure sensor for low stress deflection of membrane. The PSAFET was produced in conventional FET semiconductor fabrication and backside wet etching. The PSAFET located at the front side measured pressure change using 300 nm thin-nitride membrane when a membrane was slightly strained by the small deflection of membrane shape from backside with any physical force. The PSAFET showed high sensitivity around threshold voltage, because threshold voltage variation was composed of fractional function form in sensitivity equation of current variation. When gate voltage was biased close to threshold voltage, a fractional function form had infinite value at $V_{tn}$, which increased the current variation of sensitivity. Threshold voltage effect was dominant right after the PSAFET was turned on. Narrow transistor channel established by small current flow was choked because electron could barely cross drain-source electrodes. When gate voltage was far from threshold voltage, threshold voltage effect converged to zero in fractional form of threshold voltage variations and drain current change was mostly determined by mobility changes. As the PSAFET fabrication was compatible with a polysilicon FET in CMOS fabrication, it could be adapted in low pressure sensor and bio molecular sensor.